Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Datasheet
8.2.13
Registers 4E-53h: Temperature Limit Registers
Table 8.21 Registers 4E-53h: Temperature Limit Registers
Register
Address
Read/
Write
Bit 7
Bit 0
Default
Value
Register Name
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(MSb)
(LSb)
4Eh
4Fh
50h
51h
52h
53h
R/W
R/W
R/W
R/W
R/W
R/W
Remote Diode 1 Low Temp
Remote Diode 1 High Temp
Internal Low Temp
7
7
7
7
7
7
6
6
6
6
6
6
5
5
5
5
5
5
4
4
4
4
4
4
3
3
3
3
3
3
2
2
2
2
2
2
1
1
1
1
1
1
0
0
0
0
0
0
81h
7Fh
81h
7Fh
81h
7Fh
Internal High Temp
Remote Diode 2 Low Temp
Remote Diode 2 High Temp
Setting the Lock bit has no effect on these registers.
If an external temperature input or the internal temperature sensor either exceeds the value set in the
high limit register or is less than or equal to the value set in the low limit register, the corresponding
bit will be set automatically by the EMC6D103 in the Interrupt Status Register 1 (41h). For example,
if the temperature reading from the Remote1- and Remote1+ inputs exceeds the Remote Diode 1 High
Temp register limit setting, Bit[4] D1 of the Interrupt Status Register 1 will be set. The temperature limits
in these registers are represented as 8 bit, 2’s complement, signed numbers in Celsius, as shown
below in Table 8.22.
Table 8.22 Temperature Limits vs. Register Settings
TEMPERATURE
LIMIT (DEC)
LIMIT (HEX)
-127°c
-127
81h
.
.
.
.
.
.
.
.
.
-50°c
-50
CEh
.
.
.
.
.
.
.
.
.
0°c
0
00h
.
.
.
.
.
.
.
.
.
50°c
50
32h
.
.
.
.
.
.
.
.
.
127°c
127
7Fh
Revision 0.4 (04-04-05)
SMSC EMC6D103
DATA6S4HEET
SMSC [ SMSC CORPORATION ]
