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EMC6D103-CZC 参数 Datasheet PDF下载

EMC6D103-CZC图片预览
型号: EMC6D103-CZC
PDF下载: 下载PDF文件 查看货源
内容描述: 高频PWM风扇控制装置 [FAN CONTROL DEVICE WITH HIGH FREQUENCY PWM]
分类和应用: 运动控制电子器件风扇信号电路装置光电二极管电动机控制
文件页数/大小: 89 页 / 1515 K
品牌: SMSC [ SMSC CORPORATION ]
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Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features  
Datasheet  
Table 8.9 PWM Duty vs Register Reading  
CURRENT DUTY  
VALUE (DECIMAL)  
VALUE (HEX)  
0%  
0
00h  
25%  
50%  
64  
40h  
80h  
FFh  
128  
100%  
255  
During spin-up, the PWM duty cycle is reported as 0%.  
Notes:  
The PWMx Current Duty Cycle always reflects the current duty cycle on the associated PWM pin.  
The PWMx Current Duty Cycle register is implemented as two separate registers: a read-only and  
a write-only. When a value is written to this register in manual mode there will be a delay before  
the programmed value can be read back by software. The hardware updates the read-only PWMx  
Current Duty Cycle register on the beginning of a PWM cycle. If Ramp Rate Control is disabled,  
the delay to read back the programmed value will be from 0 seconds to 1/(PWM frequency)  
seconds. Typically, the delay will be 1/(2*PWM frequency) seconds.  
8.2.6  
Register 3Eh: Company ID  
Table 8.10 Register 3Eh: Company ID  
Register  
Address  
Read/  
Write  
Bit 7  
Bit 0  
Default  
Value  
Register Name  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
(MSb)  
(LSb)  
3Eh  
R
Company ID  
7
6
5
4
3
2
1
0
5Ch  
The Company ID register contains the company identification number. This number is a method for  
uniquely identifying the part manufacturer.  
This register is read only – a write to this register has no effect.  
8.2.7  
Register 3Fh: Version / Stepping  
Table 8.11 Register 3Fh: Version / Stepping  
Register  
Address  
Read/  
Write  
Bit 7  
Bit 0  
Default  
Value  
Register Name  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
(MSb)  
(LSb)  
3Fh  
R
Version / Stepping  
VER3  
VER  
2
VER  
1
VER  
0
STP  
3
STP  
2
STP  
1
STP0  
6Ah  
The four least significant bits of the Version / Stepping register [3:0] contain the current stepping of the  
EMC6D103 silicon. Stepping numbers are to begin from a value of 08h, to indicate that the register  
set is enhanced from previous hardware monitoring standards. The four most significant bits [7:4]  
reflect the version number, which will be fixed at 0110b. For the A0 stepping of this device, the register  
will read 01101000b. For the A1 stepping, this register will read 01101001b and so on.  
Revision 0.4 (04-04-05)  
SMSC EMC6D103  
DATA5S8HEET  
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