RPM-Based Fan Controller with Multiple Temperature Zones & Hardware Thermal Shutdown
Datasheet
7.13
Interrupt Status Register
Table 7.20 Interrupt Status Register
ADDR
R/W REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Interrupt
Status
23h
R
PWM
-
TCRIT
-
FAN
HIGH
LOW
FAULT
00h
Register
The Interrupt Status Register reports the operating condition of the EMC2113. If any of the bits are set
to a logic ‘1’ (other than TCRIT) then the ALERT pin will be asserted low if the corresponding channel
is enabled. Reading from the status register clears the PWM bit. The other bits are cleared
automatically when the corresponding register is read. If there are no set status bits, then the ALERT
pin will be released.
The bits that cause the ALERT pin to be asserted can be masked based on the channel they are
associated with unless stated otherwise.
Bit 7 - PWM - This bit indicates that the PWM input duty cycle (on the PWM pin) meets or exceeds
the high limit. This bit is cleared when the register is read.
Bit 5 - TCRIT - This bit is set to ‘1’ if any bit in the Tcrit Status Register is set. This bit is automatically
cleared when the Tcrit Status Register is read and the bits are cleared.
Bit 3 - FAN - This bit is set to ‘1’ if any bit in the Fan Status Register is set. This bit is automatically
cleared when the Fan Status Register is read and the bits are cleared.
Bit 2 - HIGH - This bit is set to ‘1’ if any bit in the High Status Register is set. This bit is automatically
cleared when the High Status Register is read and the bits are cleared.
Bit 1- LOW - This bit is set to ‘1’ if any bit in the Low Status Register is set. This bit is automatically
cleared when the Low Status Register is read and the bits are cleared.
Bit 0 - FAULT - This bit is set to ‘1’ if any bit in the Diode Fault Register is set. This bit is automatically
cleared when the Diode Fault Register is read and the bits are cleared.
7.14
Error Status Registers
Table 7.21 Error Status Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
EXT3_ EXT2_ EXT1_
TCRIT TCRIT TCRIT
INT_
TCRIT
1Fh
R-C
Tcrit Status HWS
-
-
-
00h
EXT3_ EXT2_ EXT1_
HI HI HI
24h
25h
26h
R-C
R-C
R-C
High Status
Low Status
Diode Fault
-
-
-
-
-
-
-
-
-
-
-
-
INT_HI
INT_LO
-
00h
00h
00h
EXT3_ EXT2_ EXT1_
LO LO LO
EXT3_ EXT2_ EXT1_
FLT FLT FLT
The Error Status Registers report the specific error condition for all measurement channels with limits.
If any bit is set in the High, Low, or Diode Fault Status register, the corresponding High, Low, or Fault
bit is set in the Interrupt Status Register.
SMSC EMC2113
Revision 1.2 (10-08-09)
DATA5S3HEET
SMSC [ SMSC CORPORATION ]
