RPM-Based Fan Controller with Multiple Temperature Zones & Hardware Thermal Shutdown
Datasheet
7.20
Limit Registers
Table 7.28 Limit Registers
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
External Diode
1 High Limit
55h
(+85°C)
30h
R/W
Sign
64
32
16
8
4
2
1
External Diode
2 High Limit
55h
(+85°C)
31h
32h
34h
38h
39h
3Ah
3Ch
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Sign
Sign
Sign
Sign
Sign
Sign
Sign
64
64
64
64
64
64
64
32
32
32
32
32
32
32
16
16
16
16
16
16
16
8
8
8
8
8
8
8
4
4
4
4
4
4
4
2
2
2
2
2
2
2
1
1
1
1
1
1
1
External Diode
3 High Limit
55h
(+85°C)
Internal Diode
High Limit
55h
(+85°C)
External Diode
1 Low Limit
00h
(0°C)
External Diode
2 Low Limit
00h
(0°C)
External Diode
3 Low Limit
00h
(0°C)
Internal Diode
Low Limit
00h
(0°C)
The EMC2113 contains high limits for all temperature channels. If any measurement meets or exceeds
the high limit then the appropriate status bit is set and the ALERT pin is asserted (if enabled).
Additionally, the EMC2113 contains low limits for all temperature channels. If the temperature channel
drops below the low limit, then the appropriate status bit is set and the ALERT pin is asserted (if
enabled).
All Limit Registers are Software Locked.
7.21
PWM Input Duty Cycle High Limit Register
Table 7.29 PWM Duty Cycle High Limit Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
PWM Input
Duty Cycle
High Limit
3Dh
R/W
-
64
32
16
8
4
2
1
7Fh
The PWM Duty Cycle High Limit register stores a high limit on the Duty Cycle input on the PWM pin.
The data format for the register is the same as the PWM Input Duty Cycle register (see Section 7.5,
"PWM Input Duty Cycle Register") and it is compared at the sampling rate of the PWM Input duty cycle.
If the PWM Input Duty Cycle meets or exceeds this limit, then the PWM status bit is set (see Section
7.13, "Interrupt Status Register") and the ALERT pin is asserted. This is treated as a temperature limit
by the Fan Control circuitry.
SMSC EMC2113
Revision 1.2 (10-08-09)
DATA5S7HEET
SMSC [ SMSC CORPORATION ]
