RPM-Based Fan Controller with Multiple Temperature Zones & Hardware Thermal Shutdown
Datasheet
Bit 7 - PWM_INT_EN - Allows the PWM input to assert the ALERT pin.
‘0’ (default) - The ALERT pin will not be asserted if the PWM input duty cycle meets or exceeds
its high limit.
‘1’ - The ALERT pin will be asserted if the PWM input duty cycle meets or exceeds its high limit.
Bit 3 - EXT3_INT_EN - Allows the External Diode 3 to assert the ALERT pin.
‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with External
Diode 3 channel.
‘1’ - The ALERT pin will be asserted for an error condition associated with External Diode 3
channel.
Bit 2 - EXT2_INT_EN - Allows the External Diode 2 to assert the ALERT pin.
‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with External
Diode 2 channel.
‘1’ - The ALERT pin will be asserted for an error condition associated with External Diode 2
channel.
Bit 1 - EXT1_INT_EN - Allows the External Diode 1 to assert the ALERT pin.
‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with External
Diode 1 channel.
‘1’ - The ALERT pin will be asserted for an error condition associated with External Diode 1
channel.
Bit 0 - INT_INT_EN - Allows the Internal Diode to assert the ALERT pin.
‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with the Internal
Diode.
‘1’ - The ALERT pin will be asserted for an error condition associated with the Internal Diode.
7.17
Fan Interrupt Enable Register
Table 7.24 Fan Interrupt Enable Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Fan
Interrupt
Enable
SPIN_
INT_EN INT_EN
STALL_
29h
R/W
-
-
-
-
-
-
00h
The Fan Interrupt Enable Register controls the masking for errors generated by the Fan Driver. When
a channel is masked, it will not cause the ALERT pin to be asserted when an error condition is
detected.
Bit 1 - SPIN_INT_EN - Allows the FAN_SPIN bit to assert the ALERT pin.
‘0’ (default) - the FAN_SPIN bit will not assert the ALERT pin though it will still update the Status
Register normally.
‘1’ - the FAN_SPIN bit will assert the ALERT pin.
Bit 0 - STALL_INT_EN - Allows the FAN_STALL bit or DRIVE_FAIL bit to assert the ALERT pin.
‘0’ (default) - the FAN_STALL bit or DRIVE_FAIL bit will not assert the ALERT pin though will still
update the Status Register normally.
‘1’ - the FAN_STALL bit will assert the ALERT pin.
SMSC EMC2113
Revision 1.2 (10-08-09)
DATA5S5HEET
SMSC [ SMSC CORPORATION ]
