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EMC2104-BP-TR 参数 Datasheet PDF下载

EMC2104-BP-TR图片预览
型号: EMC2104-BP-TR
PDF下载: 下载PDF文件 查看货源
内容描述: [Switching Controller]
分类和应用: 风扇控制器
文件页数/大小: 101 页 / 1474 K
品牌: SMSC [ SMSC CORPORATION ]
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Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown  
Datasheet  
APPLICATION NOTE: If any of the External Diode 1, External Diode 2, External Diode 3 is configured to operate  
as a voltage input, then the corresponding temperature high and low limit registers are  
compared against the measured voltage. The data format is the same as the measured  
voltage and these registers should be updated accordingly.  
Additionally, the EMC2104 contains low limits for all temperature channels. If the temperature channel  
drops below the low limit, then the appropriate status bit is set and the ALERT# pin are asserted (if  
enabled).  
All Limit Registers are Software Locked.  
6.20  
Fan Setting Registers  
Table 6.26 Fan Driver Setting Register  
ADDR  
R/W  
REGISTER  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
DEFAULT  
40h  
80h  
R/W  
R/W  
Fan 1 Setting  
Fan 2 Setting  
128  
128  
64  
64  
32  
32  
16  
16  
8
8
4
4
2
2
1
1
00h  
00h  
The Fan 1 Setting Register always displays the current setting of the Fan 1 Driver.Likewise, the Fan  
2 Setting Register always displays the current setting of the Fan 2 driver. Reading from either register  
will report the current fan speed setting of the appropriate fan driver regardless of the operating mode.  
Therefore it is possible that reading from this register will not report data that was previously written  
into this register.  
While the RPM based Fan Speed Control Algorithm or the Look Up Table are active (or both), then  
the register is read only. Writing to the register will have no affect and the data will not be stored.  
If both the RPM based Fan Control Algorithm and the Look Up Table are disabled, then the register  
will be set with the previous value that was used. The register is read / write and writing to this register  
will affect the fan speed.  
If the Fan 2 fan driver is disabled and the DAC2 / PWM2 / GPIO2 and TACH2 / GPIO1 pins are used  
as GPIOs, then the Fan 2 Setting Register will read 00h.  
The contents of the register represent the weighting of each bit in determining the final output voltage.  
The output drive for a PWM output is given by Equation [2].  
VALUE  
--------------------  
Drive =  
× 100%  
255  
[2]  
6.21  
PWM 1 and 2 Divide Registers  
Table 6.27 PWM 1 and 2 Divide Registers  
ADDR  
R/W  
REGISTER  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
DEFAULT  
41h  
81h  
R/W  
R/W  
PWM 1 Divide  
PWM 2 Divide  
128  
128  
64  
64  
32  
32  
16  
16  
8
8
4
4
2
2
1
1
01h  
01h  
Revision 1.74 (05-08-08)  
SMSC EMC2104  
DATA6S4HEET