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COM20022I3V-HD 参数 Datasheet PDF下载

COM20022I3V-HD图片预览
型号: COM20022I3V-HD
PDF下载: 下载PDF文件 查看货源
内容描述: 10 Mbps的ARCNET ( ANSI 878.1 )控制器2Kx8板载RAM [10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Board RAM]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输局域网时钟
文件页数/大小: 83 页 / 482 K
品牌: SMSC [ SMSC CORPORATION ]
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10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Board RAM  
Datasheet  
BIT  
BIT NAME  
SYMBOL  
DESCRIPTION  
1,0 Reconfiguration  
Timer 1, 0  
RCNTM1, These bits are used to program the reconfiguration timer as  
0
a function of maximum node count. These bits set the time  
out period of the reconfiguration timer as shown below. The  
time out periods shown are for 10 Mbps.  
Time Out  
Period  
RCNTM1 RCNTM0  
Max Node Count  
Up to 255 nodes  
Up to 64 nodes  
Up to 32 nodes  
Up to 16 nodes  
0
0
1
1
0
1
0
1
210 mS  
52.5 mS  
26.25 mS  
13.125 mS*  
Note*: The node ID value 255 must exist in the network for  
13.125 mS timeout to be valid.  
Table 6.14 - Bus Control Register  
BIT  
BIT NAME  
SYMBOL  
DESCRIPTION  
7
16 Bit Access  
W16  
This bit is used to Disable/Enable the 16 bit access. It  
influences both CPU cycle and DMA cycle. W16= 0: Disable  
(Default); W16= 1: Enable  
6
5
Reserved  
This bit is undefined.  
Internal Terminal  
Counter Enable;  
Re-Trigger mode  
ITCEN/  
RTRG  
The function of this bit is mode dependent. ITCEN is for Non-  
Burst or Burst mode. RTRG is for the two Programmable-  
Burst modes.  
ITCEN = 0: Terminate the DMA only by External TC. ITCEN  
= 1: Terminate the DMA by Internal or External TC.  
RTRG = 0: External Re-Trigger mode; Negated DREQ pin is  
Re-asserted by falling edge of nREFEX pin. RTRG = 1:  
Internal Re-Trigger mode; Negated DREQ pin is Re-asserted  
by timeout of internal gate timer (350ns/750ns).  
4
Terminal Count  
Bit 8  
TC8/  
The function of this bit is mode dependent. TC8 is for Non-  
burst or burst mode. RSYN and GTTM are for the two  
Programmable-Burst modes. RSYN is for External Re-  
Trigger mode. GTTM is for internal Re-Trigger mode.  
RSYN/  
GTTM  
Refresh  
Synchronous  
Gate Time  
Non-burst or burst mode:  
TC8: Bit 8 (MSB) of 9 bit Terminal Count setting register.  
The other 8 bits are in the DMA Count register. Terminal  
Count setting register is ignored when ITCEN = 0.  
Programmable-Burst and External Re-Trigger mode:  
RSYN = 0: DMA is started Immediately.  
RSYN = 1: DMA is started after Refresh execution.  
Programmable-Burst and Internal Re-Trigger mode:  
GTTM = 0: Gate Time is 350nS (min)  
GTTM = 1: Gate Time is 750nS (min)  
Revision 02-27-06  
Page 44  
SMSC COM20022I 3V  
DATASHEET  
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