5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
PARAMETER
Low Output Voltage 2
(D0-D7)
SYMBOL
MIN
TYP
MAX
UNIT
COMMENT
SINK=8mA
VOL2
0.4
V
I
I
I
I
High Output Voltage 2
(D0-D7)
VOH2
VOL3
VOH3
VOL4
2.4
V
V
V
V
SOURCE=-6mA
SINK=12mA
Low Output Voltage 3
(nINTR)
0.8
0.5
High Output Voltage 3
(nINTR)
2.4
SOURCE=-5mA
Low Output Voltage 4
ISINK=24mA
(nPULSE1 in Open-Drain
Mode)
Open Drain Driver
Dynamic VDD Supply
Current
IDD
IP
35
80
mA
µA
5 Mbps
All Outputs Open
VIN=0.0V
Input Pull-up Current
(nPULSE1 in Open-Drain
Mode, A1, AD0-AD2,
D3-D7)
200
±10
Input Leakage Current
(All inputs except A1,
AD0-AD2, D3-D7,
XTAL1, XTAL2
IL
µA
VSS < VIN < VDD
CAPACITANCE (TA = 25°C; fC = 1MHz; VDD = 0V)
Output and I/O pins capacitive load specified as follows:
PARAMETER
Input Capacitance
SYMBOL
CIN
MIN
TYP
MAX
UNIT
COMMENT
5.0
45
pF
pF
Output Capacitance 1
COUT1
Maximum
Capacitive Load
which can be
supported by each
output.
(All
outputs
except
XTAL2, nPULSE1 in
Push/Pull Mode)
Output Capacitance 2
(nPULSE1, in BackPlane
Mode Only - Open
Drain)
COUT2
400
pF
Revision 12-06-06
46
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DATASHEET
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