Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Table A.2 8051 Instruction Set (continued)
BYTE
INSTRUCTION
HEX
INSTRUCTION
JNC rel
DESCRIPTION
Jump on carry = 0
COUNT
CYCLES
CODE
2
3
3
4
50
20
30
73
60
70
B5
B4
JB bit, rel
Jump on direct bit = 1
JNB bit, rel
JMP @A+DPTR
JZ rel
Jump on direct bit = 0
Jump indirect relative DPTR
Jump on accumulator = 0
Jump on accumulator /= 0
Compare A, direct JNE relative
1
2
3
4
JNZ rel
CJNE A, direct, rel
CJNE A, #d, rel
3
Compare A, immediate JNE
relative
CJNE Rn, #d, rel
CJNE @Ri, #d, rel
Compare reg, immediate JNE
relative
B8-BF
B6-B7
Compare Ind, immediate JNE
relative
DJNZ Rn, rel
Decrement register, JNZ relative
2
3
3
4
D8-DF
D5
DJNZ direct, rel
Decrement direct byte, JNZ
relative
MISCELLANEOUS
NOP
No operation
1
1
00
SMSC LPC47N350
313
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
