ST7735
8
Timing chart
8.1 Parallel interface characteristics: 18, 16, 9 or 8-bit bus (8080 series MCU interface)
Fig. 8.1.1 Parallel interface timing characteristics (8080 series MCU interface)
Signal
D/CX
Symbol
TAST
TAHT
TCHW
TCS
Parameter
Min Max Unit Description
Address setup time
10
10
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
Address hold time (Write/Read)
Chip select “H” pulse width
Chip select setup time (Write)
Chip select setup time (Read ID)
15
45
TRCS
CSX
-
TRCSFM Chip select setup time (Read FM) 350
TCSF
TCSH
TWC
Chip select wait time (Write/Read) 10
Chip select hold time
Write cycle
10
100
30
WRX
TWRH
TWRL
TRC
Control pulse “H” duration
Control pulse “L” duration
Read cycle (ID)
30
160
90
RDX (ID)
When read ID data
TRDH
TRDL
TRCFM
Control pulse “H” duration (ID)
Control pulse “L” duration (ID)
Read cycle (FM)
45
450
150
150
RDX
(FM)
When read from frame
memory
TRDHFM Control pulse “H” duration (FM)
TRDLFM Control pulse “L” duration (FM)
V1.7
21
2009-12-04
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
