ST7565S
VDDꢁ/ꢁVSS2
VDDꢁ/ꢁVSS2
VDDꢁ/ꢁVSS2
+
+
+
C1
C1
C1
VOUT
VOUT
VOUT
CAP3ꢂ
CAP3ꢂ
CAP3ꢂ
C1
CAP1+
CAP1+
CAP1+
+
+
+
C1
C1
C1
CAP1ꢂ
CAP2ꢂ
CAP1ꢂ
CAP2ꢂ
CAP1ꢂ
CAP2ꢂ
C1
C1
OPEN CAP2+
CAP2+
CAP2+
+
+
OPEN CAP4ꢂ
OPEN CAP5ꢂ
OPEN CAP4ꢂ
OPEN CAP5ꢂ
OPEN CAP4ꢂ
OPEN CAP5ꢂ
2xꢁvoltageꢁboosterꢁcircuit
3xꢁvoltageꢁboosterꢁcircuit
4xꢁvoltageꢁboosterꢁcircuit
VDD=0V
VDD=0V
VDD=0V
VSS2
VSS2
VSS2
DoꢁNOTꢁoverꢁvoltage
limitation
DoꢁNOTꢁoverꢁvoltage
limitation
DoꢁNOTꢁoverꢁvoltage
limitation
VOUT<=2x(VSS2ꢂVDD)
VOUT<=3x(VSS2ꢂVDD)
VOUT<=4x(VSS2ꢂVDD)
2xꢁboostꢁvoltageꢁrelationship
3xꢁboostꢁvoltageꢁrelationship
4xꢁboostꢁvoltageꢁrelationship
VDDꢁ/ꢁVSS2
VDDꢁ/ꢁVSS2
+
+
C1
C1
VOUT
VOUT
CAP3ꢂ
C1
CAP3ꢂ
C1
+
CAP1+
CAP1+
+
C1
C1
CAP1ꢂ
CAP1ꢂ
CAP2ꢂ
C1
CAP2ꢂ
C1
+
CAP2+
CAP2+
+
C1
C1
CAP4ꢂ
CAP4ꢂ
C1
OPEN CAP5ꢂ
CAP5ꢂ
+
5xꢁvoltageꢁboosterꢁcircuit
6xꢁvoltageꢁboosterꢁcircuit
VDD=0V
VDD=0V
VSS2
VSS2
DoꢁNOTꢁoverꢁvoltage
limitation
DoꢁNOTꢁoverꢁvoltage
limitation
VOUT<=5x(VSS2ꢂVDD)
5xꢁboostꢁvoltageꢁrelationship
VOUT<=6x(VSS2ꢂVDD)
6xꢁboostꢁvoltageꢁrelationship
Figure 7
* The VSS2 voltage range must be set so that the VOUT terminal voltage does not exceed the absolute maximum rated value.
* For compatibility with ST7565P, VOUT can connect to VSS2 or VDD..
Ver 0.6c
32/72
2009/09/07
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
