SiI3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
Serial ATA Device Initialization
This section provides a general overview of the steps necessary to initialize a Serial ATA device before it can be
used for read/write operations.
Select the Serial ATA device. The device is selected by programming bits [23:16] in the Channel x
Task File Register 1 register.
If interrupt driven operation is desired, ensure that interrupts are enabled by writing 0 to bits
[23:16] of the Channel x Task File Register 2 register.
For ATA Devices Only:
Issue the Initialize Device Parameters command by
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•
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Programming bits [23:16] in the Channel x Task File 0 register with the number of
logical sectors per logical track.
Programming bits [23:16] in the Channel x Task File 1 register with the maximum
head number.
Programming bits [31:24] in the Channel x Task File Register 1 register with the
value = 91H.
Wait for the command to complete. This can be accomplished by waiting for an
interrupt if interrupts have been enabled at both the controller and the device. If
interrupts are not enabled, command completion can be detected by polling bits
[31:24] of the Channel x Task File Register 1 register until the BUSY bit is no
longer asserted.
If the device supports read/write multiple commands, issue the Set Multiple Mode
command by:
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Programming bits [23:16] in the Channel x Task File 0 register with the number of
sectors per block to use on the following Read/Write Multiple commands.
Programming bits [31:24] in the Channel x Task File Register 1 register with the
value = C6H.
Wait for the command to complete (see above).
For both ATA and ATAPI Devices:
Set device transfer mode by:
•
Programming bits [15:08] in the Channel x Task File 0 register with the value 03H
to “Set the transfer mode based on value in Sector Count Register”.
Programming bits [23:16] in the Channel x Task File 0 register to the desired
transfer mode. The settings are defined below:
08H = PIO Mode 0
•
09H = PIO Mode 1
0AH = PIO Mode 2
0BH = PIO Mode 3
0CH = PIO Mode 4
20H = Multiword DMA Mode 0
21H = Multiword DMA Mode 1
22H = Multiword DMA Mode 2
40H = Ultra DMA Mode 0
41H = Ultra DMA Mode 1
42H = Ultra DMA Mode 2
43H = Ultra DMA Mode 3
44H = Ultra DMA Mode 4
45H = Ultra DMA Mode 5
46H = Ultra DMA Mode 6
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Programming bits [31:24] in the Channel x Task File Register 1 register with the
value = EFH.
Wait for the command to complete (see above).
© 2007 Silicon Image, Inc.
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SiI-DS-0103-D
SILICONIMAGE [ Silicon image ]
