SiI3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
SFISCfg
Address Offset: 14CH / 1CCH / 34CH / 3CCH
Access Type: Read/Write
Reset Value: 0x1040_1555
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
This register contains bits for controlling Serial ATA FIS reception. See on page 86 for explanation of the
configuration bits.
RxFIS0-RxFIS6
Address Offset: 160H–178H / 1E0H–1F8H / 360H–378H / 3E0H–3F8H
Access Type: Read
Reset Value: 0x????_????
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
FIS Dword
These registers contain 7 dwords from a Serial ATA FIS reception.
© 2007 Silicon Image, Inc.
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SiI-DS-0103-D
SILICONIMAGE [ Silicon image ]
