SiI3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
Channel X Task File Register 0 – Command Buffering
Address Offset: 90H / D0H / 290H / 2D0H
Access Type: Read/Write
Reset Value: 0x0000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Starting Sector Number
Sector Count
Features
Reserved
This register defines one of the Channel X Task File registers used for Command Buffered accesses in the
SiI3114. The register bits are defined below.
• Bit [31:24]: Task File Starting Sector Number (R/W). This bit field defines the Channel X Task File Starting
Sector Number register.
• Bit [23:16]: Task File Sector Count (R/W). This bit field defines the Channel X Task File Sector Count
register.
• Bit [15:08]: Task File Features (W). This write-only bit field defines the Channel X Task File Features
register.
• Bit [07:00]: Reserved (R). This bit field is reserved and returns zeros on a read.
Channel X Task File Register 1 – Command Buffering
Address Offset: 94H / D4H / 294H / 2D4H
Access Type: Read/Write
Reset Value: 0x0000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Command
Device+Head
Cylinder High
Cylinder Low
This register defines one of the Channel X Task File registers used for Command Buffered accesses in the
SiI3114. The register bits are defined below.
The Channel 0 and Channel 1 Device Select bits (bit 4 of the byte, bit 20 of this register) MUST be 0 for proper
operation of the Task File registers when accessed via Base Address 5. The Device Select bits in the Channel 2
or Channel 3 Device+Head Task File is ignored.
• Bit [31:24]: Task File Command (W). This write-only bit field defines the Channel X Task File Command
register.
• Bit [23:16]: Task File Device+Head (R/W). This bit field defines the Channel X Task File Device and Head
register.
• Bit [15:08]: Task File Cylinder High (R/W). This bit field defines the Channel X Task File Cylinder High
register.
• Bit [07:00]: Task File Cylinder Low (R/W). This bit field defines the Channel X Task File Cylinder Low
register.
SiI-DS-0103-D
64
© 2007 Silicon Image, Inc.
SILICONIMAGE [ Silicon image ]
