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SII0680ACLU144 参数 Datasheet PDF下载

SII0680ACLU144图片预览
型号: SII0680ACLU144
PDF下载: 下载PDF文件 查看货源
内容描述: PCI转IDE / ATA [PCI to IDE/ATA]
分类和应用: PC
文件页数/大小: 124 页 / 782 K
品牌: SILICONIMAGE [ Silicon image ]
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SiI0680A PCI to IDE/ATA  
Data Sheet  
Silicon Image, Inc.  
1. Overview  
The Silicon Image PCI-680 is a single-chip solution for a PCI to ATA controller. It accepts host commands through the PCI  
bus, processes them and transfers data between the host and ATA devices. It can be used to control two independent ATA  
channels: primary and secondary. Each channel has its own ATA bus and will support up to two ATA/ATAPI devices for a  
maximum of four devices. The PCI-680 supports up to a 133 MB/sec transfer rate exceeding that which is specified in  
ATA/ATAPI-6.  
This controller provides OEMs with an enabling solution for interfacing to storage media such as hard disk drives. For personal  
computer manufacturers, using the PCI-680 will differentiate them from the competition by allowing for the addition of more  
drives and incorporating the newest drive standards, all at a lower cost. For embedded applications, the SiI 0680A provides a  
high performance and cost effective interface for storage and ATAPI device support.  
1.1 Key Benefits  
The Silicon Image PCI-680 stand-alone Ultra ATA/133 PCI to ATA host controller is the perfect single-chip solution for designs  
based on chipsets without an integrated ATA host controller, or designs which need to expand the number of ATA channels to  
accommodate the growing number of storage peripherals with ATA interface.  
The PCI-680 comes complete with drivers for Windows 98, Windows Millennium, Windows NT 4.0, Windows 2000, Windows  
XP and Linux. It is also fully operational and compatible with default IDE drivers from Microsoft.  
Comprehensive RAID (0, 1, 0+1) software support is also provided for Windows 98, NT 4.0, Windows Me, Windows 2000 and  
Windows XP.  
1.2 Features  
1.2.1 Overall Features  
Standalone PCI to ATA host controller chip  
Compliant with PCI Specification, revision 2.2.  
Compliant with PCI IDE Controller Specification, revision 1.0.  
Compliant with Programming Interface for Bus Master IDE Controller, revision 1.0.  
Compliant with ATA/ATAPI-6 specifications.  
Compliant with UDMA6 ATA/133 Specification  
Driver support for Win98, WinME, NT4, Win2K and XP.(IDE and RAID including Linux IDE support)  
Supports up to 4Mbit external FLASH or EPROM for BIOS expansion.  
Supports an external EEPROM, FLASH or serial EPROM for programmable subsystem vendor ID and  
subsystem product ID.  
Supports all necessary test requirements for WHQL.  
Supports the Microsoft driver protocols for PIO and bus master DMA operations.  
Supports DMA transfers across the 64K physical boundary and supports transfer sizes >64K (up to 2TB)  
Provides virtual DMA support for efficient PCI bus utilization for PIO transfers  
Fabricated in a 0.35μ CMOS process with a 3.3 volt core and 5 volt tolerant I/Os.  
Available in a 144-pin LQFP package.  
1.2.2 PCI Features  
Supports PCI 33 MHz with 32-bit data.  
Supports PCI PERR and SERR reporting.  
Supports PCI bus master operations: Memory Read, Memory Read Multiple, and Memory Write.  
Supports PCI bus target operations: Configuration Read, Configuration Write, I/O Read, I/O Write, Memory  
Read, Memory Write, Memory Read Line (Memory Read), Memory Read Multiple (Memory Read), Memory  
Write and Invalidate (Memory Write).  
Supports byte alignment for odd-byte PCI address access.  
Supports jumper configurable PCI class code.  
Supports programmable and EEPROM, FLASH and EPROM loadable PCI class code.  
Supports memory space (BAR5) accesses.  
Supports  
IDE native mode  
(non-legacy)  
functions  
only.  
© 2006 Silicon Image, Inc.  
SiI-DS-0069-C  
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