SiI0680A PCI to IDE/ATA
Data Sheet
Silicon Image, Inc.
Address
Offset
Register Name
Access
Type
31
16
15
00
64H
Reserved
-
68H
FIFO Byte1 Write
Pointer – IDE0
FIFO Byte1 Read
Pointer – IDE0
FIFO Byte0 Write
Pointer – IDE0
FIFO Byte0 Read
Pointer – IDE0
R
6CH
FIFO Byte3 Write
Pointer – IDE0
FIFO Byte3 Read
Pointer – IDE0
FIFO Byte2 Write
Pointer – IDE0
FIFO Byte2 Read
Pointer – IDE0
R
70H
74H
78H
FIFO Port – IDE1
Reserved
R/W
-
FIFO Byte1 Write
Pointer – IDE1
FIFO Byte1 Read
FIFO Byte0 Write
Pointer – IDE1
FIFO Byte0 Read
Pointer – IDE1
R
Pointer – IDE1
7CH
80H
84H
88H
FIFO Byte3 Write
Pointer – IDE1
FIFO Byte3 Read
Pointer – IDE1
FIFO Byte2 Write
Pointer – IDE1
FIFO Byte2 Read
Pointer – IDE1
R
IDE0 TF Starting
Sector Number
IDE0 TF
Sector IDE0 TF Features
IDE0 TF Error
IDE0 TF Data
R/W
R/W
R/W
Count
IDE0 TF
Command+Status
IDE0 TF
Device+Head
IDE0 TF Cylinder IDE0 TF Cylinder
High
Low
Reserved
IDE0 TF Device
Control Auxiliary
Status
Reserved
Reserved
8CH
90H
IDE0 Read Ahead Data
R/W
R/W
IDE0 TF Starting
Sector Number2
IDE0 TF
Sector
IDE0 TF
Features2 IDE0
TF Error2
Reserved
Count2
94H
IDE0 TF
IDE0 TF
IDE0 TF Cylinder IDE0 TF Cylinder
R/W
Cmd+Sts2
Device+Head2
High2
Low2
98H
9CH
A0H
Reserved
IDE0 Virtual DMA/PIO Read Ahead Byte Count
IDE0 TF Timing IDE0 Config IDE0
-
R/W
R/W
Cmd
+ Status
+ Status
A4H
A8H
ACH
B0H
B4H
IDE0 Device 1 PIO Timing
IDE0 Device 0 PIO Timing
IDE0 Device 0 DMA Timing
IDE0 Device 0 UDMA Timing
R/W
R/W
R/W
R/W
R/W
IDE0 Device 1 DMA Timing
IDE0 Device 1 UDMA Timing
IDE0 Test Register
Reserved
IDE0 Data
Transfer Mode
B8H
BCH
C0H
Reserved
Reserved
-
-
IDE1 TF Starting
Sector Number
IDE1 TF
Sector IDE1 TF Features
IDE1 TF Error
IDE1 TF Data
R/W
Count
C4H
C8H
IDE1 TF
Command+Status
IDE1 TF
Device+Head
IDE1 TF Cylinder IDE1 TF Cylinder
High Low
R/W
R/W
Reserved
IDE1 TF Device
Control Auxiliary
Status
Reserved
© 2006 Silicon Image, Inc.
SiI-DS-0069-C
70
SILICONIMAGE [ Silicon image ]
