SiM3C1xx
Table 3.10. SAR ADC (Continued)
Parameter
Symbol
Conditions
Min
–2
Typ
0
Max
2
Units
LSB
Offset Error (using AGND)
E
12 Bit Mode, VREF =2.4 V
10 Bit Mode, VREF =2.4 V
OFF
–1
0
1
LSB
Offset Temperatue Coefficient
Slope Error
TC
—
0.004
—
LSB/°C
%
OFF
E
12 Bit Mode
–0.07 –0.02
0.02
M
Dynamic Performance with External Reference or Internal Reference in High Speed Mode, 10 kHz Sine
Wave Input 1dB below full scale, Max throughput
Signal-to-Noise
SNR
SNDR
THD
12 Bit Mode
10 Bit Mode
12 Bit Mode
10 Bit Mode
12 Bit Mode
10 Bit Mode
12 Bit Mode
10 Bit Mode
62
58
62
58
—
—
—
—
66
60
—
—
—
—
—
—
—
—
dB
dB
dB
dB
dB
dB
dB
dB
Signal-to-Noise Plus Distortion
66
60
Total Harmonic Distortion (Up to
5th Harmonic)
78
77
Spurious-Free Dynamic Range
SFDR
–79
–74
Dynamic Performance with Internal Reference in Low Power Mode, 10 kHz Sine Wave Input 1dB below full
scale, Max throughput
Signal-to-Noise
SNR
SNDR
THD
12 Bit Mode
10 Bit Mode
12 Bit Mode
10 Bit Mode
12 Bit Mode
10 Bit Mode
12 Bit Mode
10 Bit Mode
TBD
TBD
TBD
TBD
—
66
60
—
—
—
—
—
—
—
—
dB
dB
dB
dB
dB
dB
dB
dB
Signal-to-Noise Plus Distortion
66
60
Total Harmonic Distortion (Up to
5th Harmonic)
78
—
77
Spurious-Free Dynamic Range
SFDR
—
–72
–71
—
*Note: Absolute input pin voltage is limited by the lower of the supply at VDD and VIO.
18
Preliminary Rev. 0.8
SILICON [ SILICON ]
