SiM3C1xx
Table 3.10. SAR ADC
Parameter
Symbol
Conditions
12 Bit Mode
Min
Typ
12
10
—
Max
Units
Bits
Bits
V
Resolution
N
bits
10 Bit Mode
Supply Voltage Requirements
(VDD)
V
High Speed Mode
Low Power Mode
12 Bit Mode
2.2
1.8
—
3.6
3.6
250
1
ADC
—
V
Throughput Rate
(High Speed Mode)
f
f
—
ksps
Msps
ksps
ksps
ns
S
S
10 Bit Mode
—
—
Throughput Rate
(Low Power Mode)
12 Bit Mode
—
—
62.5
250
—
10 Bit Mode
—
—
Tracking Time
t
High Speed Mode
Low Power Mode
High Speed Mode
Low Power Mode
230
450
—
—
TRK
SAR
CNV
—
—
ns
SAR Clock Frequency
Conversion Time
f
—
16.24
4
MHz
MHz
ns
—
—
t
10-Bit Conversion,
SAR Clock = 16 MHz,
APB Clock = 40 MHz.
762.5
Sample/Hold Capacitor
Input Pin Capacitance
Input Mux Impedance
C
Gain = 1
Gain = 0.5
—
—
—
—
—
—
1
5
2.5
18
20
300
550
—
—
—
—
—
—
—
pF
pF
pF
pF
SAR
C
High Quality Inputs
Normal Inputs
High Quality Inputs
Normal Inputs
IN
R
MUX
Voltage Reference Range
Input Voltage Range*
V
V
V
REF
DD
V
Gain = 1
0
—
V
V
IN
REF
Gain = 0.5
0
—
2xV
V
REF
Power Supply Rejection Ratio
DC Performance
PSRR
—
70
—
dB
ADC
Integral Nonlinearity
INL
12 Bit Mode
10 Bit Mode
12 Bit Mode
10 Bit Mode
—
—
–1
—
±1
±1.9
±0.5
1.8
LSB
LSB
LSB
LSB
±0.2
±0.7
±0.2
Differential Nonlinearity
(Guaranteed Monotonic)
DNL
±0.5
*Note: Absolute input pin voltage is limited by the lower of the supply at VDD and VIO.
Preliminary Rev. 0.8
17
SILICON [ SILICON ]
