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SI1002-C-GM 参数 Datasheet PDF下载

SI1002-C-GM图片预览
型号: SI1002-C-GM
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗, 64/32 KB , 10位ADC, MCU ,集成了240-960兆赫的EZRadioPRO收发器 [Ultra Low Power, 64/32 kB, 10-Bit ADC MCU with Integrated 240-960 MHz EZRadioPRO Transceiver]
分类和应用:
文件页数/大小: 376 页 / 2369 K
品牌: SILICON [ SILICON ]
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Si1000/1/2/3/4/5  
Workarounds:  
a. The SMBus interrupt service routine should verify an address when it is received and clear SI as  
soon as possible if the address does not match to minimize clock stretching. To prevent clock  
stretching when not being addressed, enable setup and hold time extensions (EXTHOLD = 1).  
b. Detection of Initial Start:  
To distinguish between the reception of an address byte at the beginning of a transfer versus  
the reception of a data byte when setup and hold time extensions are enabled (EXTHOLD = 1),  
software should maintain a status bit to determine whether it is currently inside or outside a  
transfer. Once hardware detects a matching slave address and interrupts the MCU, software  
should assume a start condition and set the software bit to indicate that it is currently inside a  
transfer. A transfer ends any time the STO bit is set or on an error condition (e.g., SCL Low  
Timeout).  
Detection of Repeated Start:  
To detect the reception of an address byte in the middle of a transfer when setup and hold time  
extensions are enabled (EXTHOLD = 1), disable setup and hold time extensions (EXTHOLD =  
0) upon entry into a transfer and re-enable setup and hold time extensions (EXHOLD = 1) at the  
end of a transfer.  
c. Schedule a timer interrupt to clear the ACK bit at an interval shorter than 7 bit periods when the  
slave is not being addressed. For example, on a 400 kHz SMBus, the ACK bit should be cleared  
every 17.5 µs (or at 1/7 the bus frequency, 57 kHz). As soon as a matching slave address is  
detected (a transfer is started), the timer which clears the ACK bit should be stopped and its  
interrupt flag cleared. The timer should be re-started once a stop or error condition is detected  
(the transfer has ended).  
A code example demonstrating these workarounds can be found in the SMBus examples folder with the  
following default location:  
C:\SiLabs\MCU\Examples\C8051F93x_92x\SMBus\F93x_SMBus_Slave_Multibyte_HWACK.c  
The SMBus examples folder, along with examples for many additional peripherals, is created when the Sil-  
icon Laboratories IDE is installed. The latest version of the IDE may be downloaded from the software  
downloads page www.silabs.com/MCUDownloads on the Silicon Laboratories website.  
The following issue is present when operating as a master in a multi-master SMBus configuration:  
If the SMBus master loses arbitration in a multi-master system, it may cause interference on the SMBus by  
driving SDA low during the ACK cycle of transfers which it is not participating. This will occur regardless of  
the state of the ACK bit (SMB0CN.1).  
Impact:  
The SMBus master and slave participating in the transfer are prevented from generating a NACK by the  
MCU because it is holding SDA low during the ACK cycle. There is a potential for the SMBus to lock up.  
Workaround:  
Disable Hardware Acknowledge (EHACK = 0) when the MCU is operating as a master in a multi-master  
SMBus configuration.  
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Rev. 1.0