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SI1005 参数 Datasheet PDF下载

SI1005图片预览
型号: SI1005
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗, 64/32 KB , 10位ADC, MCU ,集成了240-960兆赫的EZRadioPRO收发器 [Ultra Low Power, 64/32 kB, 10-Bit ADC MCU with Integrated 240-960 MHz EZRadioPRO Transceiver]
分类和应用:
文件页数/大小: 376 页 / 2369 K
品牌: SILICON [ SILICON ]
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Si1000/1/2/3/4/5  
5.2.4. Settling Time Requirements  
A minimum amount of tracking time is required before each conversion can be performed, to allow the  
sampling capacitor voltage to settle. This tracking time is determined by the AMUX0 resistance, the ADC0  
sampling capacitance, any external source resistance, and the accuracy required for the conversion. Note  
that in low-power tracking mode, three SAR clocks are used for tracking at the start of every conversion.  
For many applications, these three SAR clocks will meet the minimum tracking time requirements, and  
higher values for the external source impedance will increase the required tracking time.  
Figure 5.4 shows the equivalent ADC0 input circuit. The required ADC0 settling time for a given settling  
accuracy (SA) may be approximated by Equation 5.1. When measuring the Temperature Sensor output or  
V
with respect to GND, R  
reduces to R  
. See Table 4.9 for ADC0 minimum settling time require-  
DD  
TOTAL  
MUX  
ments as well as the mux impedance and sampling capacitor values.  
2n  
SA  
------  
t = ln  
RTOTALCSAMPLE  
Equation 5.1. ADC0 Settling Time Requirements  
Where:  
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)  
t is the required settling time in seconds  
R
is the sum of the AMUX0 resistance and any external source resistance.  
TOTAL  
n is the ADC resolution in bits (10).  
MUX Select  
P0.x  
RMUX  
CSAMPLE  
RCInput= RMUX * CSAMPLE  
Note: The value of CSAMPLE depends on the PGA Gain. See Table 4.9 for details.  
Figure 5.4. ADC0 Equivalent Input Circuits  
Rev. 1.0  
79