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C8051F530-IM 参数 Datasheet PDF下载

C8051F530-IM图片预览
型号: C8051F530-IM
PDF下载: 下载PDF文件 查看货源
内容描述: 8/4/2 KB ISP功能的Flash MCU系列 [8/4/2 kB ISP Flash MCU Family]
分类和应用:
文件页数/大小: 220 页 / 2701 K
品牌: SILICON [ SILICON ]
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C8051F52x-53x  
SFR Definition 17.13. LINST: LIN STATUS Register  
R
R
R
R
R/W  
LININT  
Bit3  
R
R
R
Reset Value  
ACTIVE IDLTOUT ABORT  
DTREQ  
Bit4  
ERROR WAKEUP  
DONE  
Bit0  
00000000  
Bit7  
Bit6  
Bit5  
Bit2  
Bit1  
0x09  
(indirect)  
SFR Address:  
Bit7:  
ACTIVE: LIN Bus Activity Bit.  
This bit shows when transmission activity in the bus is detected by the peripheral.  
1 - Transmission activity detected by the peripheral  
0 - No transmission detected by the peripheral.  
Bit6:  
Bit5:  
Bit4:  
IDLTOUT: Bus Idle Timeout.(slave mode only)  
This bit is set by the peripheral if no bus activity is detected over a period of 4 seconds and  
the SLEEP bit in the LINCTRL (LIN Control Register) is not set by the application. Upon set-  
ting this bit the peripheral also sets the interrupt Request Bit (LININT) and the applications  
can then assume that the LIN bus is in sleep mode and set the SLEEP bit (LINCTRL.6).  
ABORT: Aborted transmission signal.(slave mode only)  
This bit is set by the peripheral when a new SYNCH BREAK signal is detected before the  
end of the last transmission. The transmission is aborted and the new frame is processed.  
This bit is also set when the application sets the STOP bit (from LINCTRL). Once a SYNCH  
BREAK signal is received (if it doesn’t interrupt another transmission) this signal is reset.  
DTREQ: Data Request bit.(slave mode only)  
The peripheral sets this bit after receiving the Identifier and requests an interrupt. The appli-  
cation has then to perform the following actions:  
1- Decode the Identifier to decide whether the current frame is a transmit or a receive opera-  
tion.  
2- Adjust the TXRX bit (in LINCTRL) and to load the data length.  
3- In case of a transmit operation the application must load the data buffer.  
4- Set the DTACK bit (data acknowledge) found in the LINCTRL register.  
LININT: Interrupt Request bit.  
This bit is set when an interrupt is issued and has to be reset by the application by setting  
the RSTINT bit (LINCTRL)  
ERROR: Communication Error Bit.  
The peripheral sets the bit if an error has been detected. The bit has to be reset by the appli-  
cation by setting the RSTERR bit (LINCTRL).  
Bit3:  
Bit2:  
Bit1:  
Bit0:  
WAKEUP: Wake-Up Request Bit.  
The bit is set when the peripheral is transmitting a Wake-Up signal or has received a Wake-  
Up signal.  
DONE: Transmission Complete Bit.  
The peripheral sets this bit at the end of a successful transmission and resets it at the start  
of another transmission.  
158  
Rev. 0.3  
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