C8051F50x-F51x
been accumulated. Similarly, the Window Comparator will not compare the result to the greater-than and
less-than registers until “repeat count” conversions have been accumulated.
Note: When using Burst Mode, care must be taken to issue a convert start signal no faster than once every
four SYSCLK periods. This includes external convert start signals.
System Clock
Convert Start
Post-Tracking
Powered
Down
Power-Up
and Idle
Powered
Down
Power-Up
and Idle
AD0TM = 01
AD0EN = 0
T
T
C
C
T
T
C
C
T
T
C
C
T
T
C
C
T
T
C..
C..
Dual-Tracking
AD0TM = 11
AD0EN = 0
Powered
Down
Power-Up
and Track
Powered
Down
Power-Up
and Track
AD0PW R
Post-Tracking
AD0TM = 01
AD0EN = 1
Idle
T
T
C
C
T
T
C
C
T
T
C
C
T
T
C
C
Idle
T
T
C
C
T
T
C
C
T
T
C..
C..
Dual-Tracking
AD0TM = 11
AD0EN = 1
Track
Track
T = Tracking
C = Converting
Figure 6.4. 12-Bit ADC Burst Mode Example With Repeat Count Set to 4
56
Rev. 1.1
SILICON [ SILICON ]
