C8051F336/7/8/9
10. Voltage Reference (C8051F336/8 only)
The Voltage reference multiplexer for the ADC is configurable to use an externally connected voltage refer-
ence, the on-chip reference voltage generator routed to the VREF pin, or the V power supply voltage
DD
(see Figure 10.1). The REFSL bit in the Reference Control register (REF0CN, SFR Definition 10.1) selects
the reference source for the ADC. For an external source or the on-chip reference, REFSL should be set to
‘0’ to select the VREF pin. To use V as the reference source, REFSL should be set to ‘1’.
DD
The BIASE bit enables the internal voltage bias generator, which is used by many of the analog peripherals
on the device. This bias is automatically enabled when any peripheral which requires it is enabled, and it
does not need to be enabled manually. The bias generator may be enabled manually by writing a ‘1’ to the
BIASE bit in register REF0CN. The electrical specifications for the voltage reference circuit are given in
Table 6.10.
The on-chip voltage reference circuit consists of a 1.2 V, temperature stable bandgap voltage reference
generator and a gain-of-two output buffer amplifier. The on-chip voltage reference can be driven on the
VREF pin by setting the REFBE bit in register REF0CN to a ‘1’. The maximum load seen by the VREF pin
must be less than 200 µA to GND. Bypass capacitors of 0.1 µF and 4.7 µF are recommended from the
VREF pin to GND. If the on-chip reference is not used, the REFBE bit should be cleared to ‘0’. Electrical
specifications for the on-chip voltage reference are given in Table 6.10.
Important Note about the VREF Pin: When using either an external voltage reference or the on-chip ref-
erence circuitry, the VREF pin should be configured as an analog pin and skipped by the Digital Crossbar.
Refer to Section “20. Port Input/Output” on page 126 for the location of the VREF pin, as well as details of
how to configure the pin in analog mode and to be skipped by the crossbar.
REF0CN
To ADC, IDAC,
Internal Oscillators
EN
EN
Bias Generator
Temp Sensor
IOSCE
N
VDD
External
Voltage
To Analog Mux
Reference
Circuit
R1
VREF
0
1
VREF
(to ADC)
GND
VDD
REFBE
+
4.7µF
0.1µF
EN
Internal
Reference
Recommended Bypass
Capacitors
Figure 10.1. Voltage Reference Functional Block Diagram
Rev. 0.2
63
SILICON [ SILICON ]
