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C8051F336 参数 Datasheet PDF下载

C8051F336图片预览
型号: C8051F336
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路
文件页数/大小: 234 页 / 3348 K
品牌: SILICON [ SILICON ]
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C8051F336/7/8/9  
SFR Definition 20.14. P1SKIP: Port 1 Skip  
Bit  
7
6
5
4
3
2
1
0
Name  
Type  
Reset  
P1SKIP[7:0]  
R/W  
0
0
0
0
0
0
0
0
SFR Address = 0xD5  
Bit  
Name  
Function  
7:0  
P1SKIP[7:0] Port 1 Crossbar Skip Enable Bits.  
These bits select Port 1 pins to be skipped by the Crossbar Decoder. Port pins  
used for analog, special functions or GPIO should be skipped by the Crossbar.  
0: Corresponding P1.n pin is not skipped by the Crossbar.  
1: Corresponding P1.n pin is skipped by the Crossbar.  
SFR Definition 20.15. P2: Port 2  
Bit  
7
6
5
4
3
2
1
0
Name  
Type  
Reset  
P2[4:0]  
R/W  
R
0
R
0
R
0
1
1
1
1
1
SFR Address = 0xA0  
Bit Name  
7:5 UNUSED Unused.  
4:0 P2[4:0] Port 2 Data.  
Description  
Write  
Read  
Don’t Care  
000b  
0: Set output latch to logic 0: P2.n Port pin is logic  
LOW. LOW.  
1: Set output latch to logic 1: P2.n Port pin is logic  
HIGH. HIGH.  
Sets the Port latch logic  
value or reads the Port pin  
logic state in Port cells con-  
figured for digital I/O.  
Note: Pins P2.1-P2.4 are only available in QFN24-packaged devices.  
142  
Rev. 0.2