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C8051F336 参数 Datasheet PDF下载

C8051F336图片预览
型号: C8051F336
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路
文件页数/大小: 234 页 / 3348 K
品牌: SILICON [ SILICON ]
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C8051F336/7/8/9  
SFR Definition 20.12. P1MDIN: Port 1 Input Mode  
Bit  
7
6
5
4
3
2
1
0
Name  
Type  
Reset  
P1MDIN[7:0]  
R/W  
1
1
1
1
1
1
1
1
SFR Address = 0xF2  
Bit  
Name  
Function  
7:0  
P1MDIN[7:0] Analog Configuration Bits for P1.7–P1.0 (respectively).  
Port pins configured for analog mode have their weak pullup, digital driver, and  
digital receiver disabled.  
0: Corresponding P1.n pin is configured for analog mode.  
1: Corresponding P1.n pin is not configured for analog mode.  
SFR Definition 20.13. P1MDOUT: Port 1 Output Mode  
Bit  
7
6
5
4
3
2
1
0
Name  
Type  
Reset  
P1MDOUT[7:0]  
R/W  
0
0
0
0
0
0
0
0
SFR Address = 0xA5  
Bit Name  
Function  
7:0 P1MDOUT[7:0] Output Configuration Bits for P1.7–P1.0 (respectively).  
These bits are ignored if the corresponding bit in register P1MDIN is logic 0.  
0: Corresponding P1.n Output is open-drain.  
1: Corresponding P1.n Output is push-pull.  
Rev. 0.2  
141