欢迎访问ic37.com |
会员登录 免费注册
发布采购

C8051F336 参数 Datasheet PDF下载

C8051F336图片预览
型号: C8051F336
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路
文件页数/大小: 234 页 / 3348 K
品牌: SILICON [ SILICON ]
 浏览型号C8051F336的Datasheet PDF文件第133页浏览型号C8051F336的Datasheet PDF文件第134页浏览型号C8051F336的Datasheet PDF文件第135页浏览型号C8051F336的Datasheet PDF文件第136页浏览型号C8051F336的Datasheet PDF文件第138页浏览型号C8051F336的Datasheet PDF文件第139页浏览型号C8051F336的Datasheet PDF文件第140页浏览型号C8051F336的Datasheet PDF文件第141页  
C8051F336/7/8/9  
SFR Definition 20.5. P1MASK: Port 1 Mask Register  
Bit  
7
6
5
4
3
2
1
0
Name  
Type  
Reset  
P1MASK[7:0]  
R/W  
1
1
1
1
1
1
1
1
SFR Address = 0xEE  
Bit Name  
7:0 P1MASK[7:0] Port 1 Mask Value.  
Function  
Selects P1 pins to be compared to the corresponding bits in P1MAT.  
0: P1.n pin logic value is ignored and cannot cause a Port Mismatch event.  
1: P1.n pin logic value is compared to P1MAT.n.  
SFR Definition 20.6. P1MAT: Port 1 Match Register  
Bit  
7
6
5
4
3
2
1
0
Name  
Type  
Reset  
P1MAT[7:0]  
R/W  
0
0
0
0
0
0
0
0
SFR Address = 0xED  
Bit  
Name  
Function  
7:0  
P1MAT[7:0]  
Port 1 Match Value.  
Match comparison value used on Port 1 for bits in P1MAT which are set to ‘1’.  
0: P1.n pin logic value is compared with logic LOW.  
1: P1.n pin logic value is compared with logic HIGH.  
Rev. 0.2  
137  
 复制成功!