C8051F360/1/2/3/4/5/6/7/8/9
1.1.3. Additional Features
The C8051F36x SoC family includes several key enhancements to the CIP-51 core and peripherals to
improve performance and ease of use in end applications.
The extended interrupt handler provides 16 interrupt sources into the CIP-51 (as opposed to 7 for the stan-
dard 8051), allowing numerous analog and digital peripherals to interrupt the controller. An interrupt driven
system requires less intervention by the MCU, giving it more effective throughput. The extra interrupt
sources are very useful when building multi-tasking, real-time systems.
Eight reset sources are available: power-on reset circuitry (POR), an on-chip V
Monitor (forces reset
DD
when power supply voltage drops below V
as given in Table 12.1 on page 134), a Watchdog Timer, a
RST
Missing Clock Detector, a voltage level detection from Comparator0, a forced software reset, an external
reset pin, and an illegal Flash access protection circuit. Each reset source except for the POR, Reset Input
Pin, or Flash error may be disabled by the user in software. The WDT may be permanently enabled in soft-
ware after a power-on reset during MCU initialization.
The internal oscillator factory calibrated to 24.5 MHz ±2%. This internal oscillator period may be user pro-
grammed in ~0.5% increments. An additional low-frequency oscillator is also available which facilitates
low-power operation. An external oscillator drive circuit is included, allowing an external crystal, ceramic
resonator, capacitor, RC, or CMOS clock source to generate the system clock. If desired, the system clock
source may be switched on-the-fly between both internal and external oscillator circuits. An external oscil-
lator can also be extremely useful in low power applications, allowing the MCU to run from a slow (power
saving) source, while periodically switching to the fast (up to 25 MHz) internal oscillator as needed. Addi-
tionally, an on-chip PLL is provided to achieve higher system clock speeds for increased throughput.
VDD
Power On
Reset
Supply
Monitor
+
-
'0'
/RST
Enable
Comparator 0
(wired-OR)
Px.x
Px.x
+
-
C0RSEF
Missing
Clock
Detector
(one-
shot)
Reset
Funnel
PCA
WDT
(Software Reset)
SWRSF
EN
Low
Frequency
Oscillator
EN
Errant
FLASH
Operation
Internal
Oscillator
System
Clock
PLL
Circuitry
CIP-51
Microcontroller
Core
System Reset
External
Oscillator
Drive
XTAL1
XTAL2
Clock Select
Extended Interrupt
Handler
Figure 1.5. On-Chip Clock and Reset
Rev. 1.0
23
SILICON [ SILICON ]
