SX1232
WIRELESS & SENSING
DATASHEET
Name
(Address)
Default
value
Bits
Mode
Variable Name
Description
RegOcp
(0x0B)
7-6
5
unused
OcpOn
r
0x00 unused
rw
0x01 Enables overload current protection (OCP) for the PA:
0 Æ OCP disabled
1 Æ OCP enabled
4-0
OcpTrim
rw
0x0b Trimming of OCP current:
I
= 45+5*OcpTrim [mA] if OcpTrim <= 15 (120 mA) /
max
I
= -30+10*OcpTrim [mA] if 15 < OcpTrim <= 27 (130 to
max
240 mA)
= 240mA for higher settings
I
max
Default I
= 100mA
max
Registers for the Receiver
RegLna
(0x0C)
7-5
LnaGain
rw
0x01 LNA gain setting:
000 Æ reserved
001 Æ G1 = highest gain
010 Æ G2 = highest gain – 6 dB
011 Æ G3 = highest gain – 12 dB
100 Æ G4 = highest gain – 24 dB
101 Æ G5 = highest gain – 36 dB
110 Æ G6 = highest gain – 48 dB
111 Æ reserved
Note:
Reading this address always returns the current LNA gain
(which may be different from what had been previously
selected if AGC is enabled.
4-2
1-0
-
r
0x00 unused
LnaBoost
rw
0x00 Improves the system Noise Figure at the expense of Rx
current consumption:
00 Æ Default setting, meeting the specification
11 Æ Improved sensitivity
RegRxConfig
(0x0d)
7
RestartRxOnCollision
rw
0x00 Turns on the mechanism restarting the receiver automatically
if it gets saturated or a packet collision is detected
0 Æ No automatic Restart
1 Æ Automatic restart On
6
5
RestartRxWithoutPllLock
RestartRxWithPllLock
wt
wt
0x00 Triggers a manual Restart of the Receiver chain when set to 1.
Use this bit when there is no frequency change,
RestartRxWithPllLock otherwise.
0x00 Triggers a manual Restart of the Receiver chain when set to 1.
Use this bit when there is a frequency change, requiring some
time for the PLL to re-lock.
4
3
AfcAutoOn
AgcAutoOn
RxTrigger
rw
rw
rw
0x00 0 Æ No AFC performed at receiver startup
1 Æ AFC is performed at each receiver startup
0x01 0 Æ LNA gain forced by the LnaGain Setting
1 Æ LNA gain is controlled by the AGC
2-0
0x06 Selects the event triggering AGC and/or AFC at receiver
*
startup. See Table 22 for a description.
Rev 3 - August 2012
Page 69
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