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LC72121 参数 Datasheet PDF下载

LC72121图片预览
型号: LC72121
PDF下载: 下载PDF文件 查看货源
内容描述: PLL频率合成器的电子调谐 [PLL Frequency Synthesizers for Electronic Tuning]
分类和应用: 光电二极管电子
文件页数/大小: 22 页 / 378 K
品牌: SANYO [ SANYO SEMICON DEVICE ]
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LC72121, 72121M, 72121V  
Figure 3 Combining with Software  
• Outputting the unlocked state data in the serial data  
At the point of data output 1 in figure 3, the unlocked state data will indicate the unlocked state, since the VCO  
frequency is not stable (locked) yet. In cases such as this, the application should wait at least one whole period and then  
check again whether or not the frequency has stabilized with the data output 2 operation in the figure. Applications can  
implement even more reliable recognition of the locked state by performing several more checks of the state and  
requiring that the locked state be detected sequentially.  
<Flowchart for Lock Detection>  
Divisor N changed (data input)  
Wait at least 2 reference frequency periods.  
Data output (1)  
Valid output data is acquired by using an interval of at  
least one reference frequency period.  
Data output (2)  
*: Even more reliable recognition of the locked state  
can be achieved by performing several checks of the  
state and requiring that the locked state be detected  
sequentially.  
Locked state check  
NO  
YES  
A10180  
• Directly outputting the unlocked state to the DO pin  
Since the unlocked state (high level when locked, low when unlocked) is output from the DO pin, applications can  
check for the locked state by waiting at least two reference frequency periods after changing the divisor N. However, in  
this case also, even more reliable recognition of the locked state can be achieved by performing several checks of the  
state and requiring that the locked state be detected sequentially.  
No. 5815-18/22  
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