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S3C6410X66-YB40
S3C6410X_UM_REV0.00
PRODUCT OVERVIEW
1.1.11.2 IIC-Bus Interface
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2-ch Multi-Master IIC-Bus
Serial, 8-bit oriented and bi-directional data transfers can be made at up to 100 Kbps in the standard mode
up to 400 Kbps in the fast mode
1.1.11.3 SPI Interface
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2ch Serial Peripheral Interface
64byte buffters for receive/transmit
DMA-based or interrupt-based operation
50Mbps Master Tx/Rx, 50Mbps Slave Tx, 20Mbps Slave Rx
1.1.11.4 MIPI HSI
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A uni-direction high speed serial interface
Supports Tx and Rx
128 Byte (32-bit x 32) Tx FIFO
256 Byte (32-bit x 64) Rx FIFO
TX : PCLK bps, RX : up to 100Mbps
1.1.12 MODEM & HOST INTERFACE
The S3C6410 microprocessor provides the following Modem Interface features:
1.1.12.1 Parallel Modem Chip Interface
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Asynchronous direct SRAM interface style interface
16-bit parallel bus for data transfer
On-chip 8K bytes internal dual-port SRAM buffer
Interrupt request for data exchange
Programmable interrupt port address
Support from 1.8V to 3.3V I/O voltage range
AP Booting for Modem procedure provides a dual-port memory as a Modem boot memory.
1.1.12.1 Host Interface
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Asynchronous indirect SRAM interface style interface (i80 interface)
16-bit protocol register
On-chip Write FIFO and Read FIFO (each 288-word) to support indirect burst transfer
Single R/W on the SFR/memory in the system memory map
Burst R/W on the SFR/memory in the system memory map
Repeated Burst Write on the SFR/memory in the system memory map
Supports Modem Booting that enables HOST to control AP boot without AP-dedicated nand flash.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
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SAMSUNG [ SAMSUNG ]
