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S3C6410X66-YB40
S3C6410X_UM_REV0.00
PRODUCT OVERVIEW
1.1.15 STORAGE DEVICES
The S3C6410 microprocessor provides the following Storage Devices features:
1.1.15.1 SD/MMC Host Controller
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Multimedia Card Protocol version 4.0 compatible
SD Memory Card Protocol version 2.0 compatible
SDIO Card Protocol version 1.0 compatible
128 words FIFO for Tx/Rx
DMA based or Interrupt based operation
3 channel SD/MMC Host Controller
Support CE-ATA interface
1.1.16 SYSTEM PERIPHERALS
The S3C6410 microprocessor provides the following System Peripherals features:
1.1.16.1 DMA controller
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4 General DMAs embedded.
8-channel supported per each DMA; totally 32 channel is supported.
Supports memory to memory, peripheral to memory, memory to peripheral, and peripheral to peripheral
Burst transfer mode to enhance the transfer rate.
1.1.16.2 Vectored Interrupt Controller
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Supports for 64 vectored IRQ interrupts
Fixed hardware interrupt priority levels
Programmable interrupt priority levels
Hardware interrupt priority level masking
IRQ and FIQ generation
Raw interrupt status
Interrupt request status
Privileged mode support for restricted access
Support for ARM v6 processor VIC port, enabling faster interrupt servicing
1.1.16.3 TrustZone Protection Controller
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Provides a software interface to the protection bits in a secure system in a TrustZone design
Protection bits to enable programming of up to 24 areas of memory as secure or non-secure
AMBA APB interface
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
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SAMSUNG [ SAMSUNG ]
