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S3C4510B 参数 Datasheet PDF下载

S3C4510B图片预览
型号: S3C4510B
PDF下载: 下载PDF文件 查看货源
内容描述: 三星S3C4510B的16位/ 32位RISC微控制器是一款高性价比,高性能的基于以太网的系统微控制器解决方案。 [Samsungs S3C4510B 16/32-bit RISC microcontroller is a cost-effective, high-performance microcontroller solution for Ethernet-based systems.]
分类和应用: 微控制器以太网
文件页数/大小: 422 页 / 2160 K
品牌: SAMSUNG [ SAMSUNG ]
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PROGRAMMER'S MODEL  
Software Interrupt  
S3C4510B  
The software interrupt instruction (SWI) is used for entering Supervisor mode, usually to request a particular  
supervisor function. A SWI handler should return by executing the following irrespective of the state (ARM or  
Thumb):  
MOV  
PC,R14_svc  
This restores the PC and CPSR, and returns to the instruction following the SWI.  
NOTE  
nFIQ, nIRQ, ISYNC, LOCK, BIGEND, and ABORT pins exist only in the ARM7TDMI CPU core.  
Undefined Instruction  
When ARM7TDMI comes across an instruction which it cannot handle, it takes the undefined instruction trap.  
This mechanism may be used to extend either the THUMB or ARM instruction set by software emulation.  
After emulating the failed instruction, the trap handler should execute the following irrespective of the state (ARM  
or Thumb):  
MOVS  
PC,R14_und  
This restores the CPSR and returns to the instruction following the undefined instruction.  
Exception Vectors  
The following table shows the exception vector addresses.  
Table 2-3. Exception Vectors  
Address  
Exception  
Mode in Entry  
Supervisor  
0x00000000  
0x00000004  
0x00000008  
0x0000000C  
0x00000010  
0x00000014  
0x00000018  
0x0000001C  
Reset  
Undefined instruction  
Software Interrupt  
Abort (prefetch)  
Abort (data)  
Reserved  
Undefined  
Supervisor  
Abort  
Abort  
Reserved  
IRQ  
IRQ  
FIQ  
FIQ  
2-14  
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