UART
S3C4510B
UART RECEIVE BUFFER REGISTER
The UART receive buffer registers, URXBUF0 and URXBUF1, contain an 8-bit data value for received serial
data.
Table 10-10. UXRBUF0 and UXRBUF1 Registers
Registers
URXBUF0
Offset Address
0xD010
R/W
R
Description
UART0 receive buffer register
UART1 receive buffer register
Reset Value
0xXX
URXBUF1
0xE010
R
0xXX
Table 10-11. UART Transmit Register Description
Bit Name Reset Value
Receive data
Bit Number
[7:0]
This field contains the data received over the single channel
UART.
When the UART finishes receiving a data frame, the receive data
ready bit in the UART status register, USTAT[5], should be "1".
This prevents reading invalid receive data that may already be
present in the URXBUF.
Whenever the URXBUF is read, the receive data ready
bit(USTAT[5]) is automatically cleared to "0".
31
8 7 6 5 4 3 2 1 0
Receive Data
[7:0] Receive data for UART
Figure 10-6. UART Receive Buffer Registers
10-12
SAMSUNG [ SAMSUNG ]
