S3C4510B
UART
Table 10-7. UART Status Register Description (Continued)
Bit Number
Bit Name
Reset Value
[5]
Receive data ready
USTAT[5] is automatically set to "1" whenever the receive data
buffer register (URXBUF) contains valid data received over the
serial port. The receive data can then be read from the URXBUF.
When this bit is "0", the URXBUF does not contain valid data.
Depending on the current setting of the UART receive mode bits,
UCON[1:0], an interrupt or a DMA request is generated when
USTAT[5] is "1".
[6]
Tx Buffer register empty USTAT[6] is automatically set to "1" when the transmit buffer
register (UTXBUF) does not contain valid data. In this case, the
UTXBUF can be written with the data to be transmitted.
When this bit is "0", the UTXBUF contains valid Tx data that has
not yet been copied to the transmit shift register. In this case, the
UTXBUF cannot be written with new Tx data.
Depending on the current setting of the SIO transmit mode bits,
UCON[4:3], an interrupt or a DMA request will be generated
whenever USTAT[6] is "1".
[7]
Transmit complete (TC) USTAT[7] is automatically set to "1" when the transmit buffer
register has no valid data to transmit and when the Tx shift register
is empty. When the transmitter empty bit is "1", it indicates to
software that it can now disable the transmitter function block.
10-9
SAMSUNG [ SAMSUNG ]
