S3C4510B
UART
10 SERIAL I/O (UART)
OVERVIEW
The S3C4510B UART (Universal Asynchronous Receiver/Transmitter) unit provides two independent
asynchronous serial I/O (SIO) ports. Each port can operate in interrupt-based or DMA-based mode. That is, the
UART can generate internal interrupts or DMA requests to transfer data between the CPU and the serial I/O
ports.
The most important features of the S3C4510B UART include:
— Programmable baud rates
— Infra-red (IR) transmit/receive
— Insertion of one or two Stop bits per frame
— Selectable 5-bit, 6-bit, 7-bit, or 8-bit data transfers
— Parity checking
Each SIO unit has a baud rate generator, transmitter, receiver, and a control unit, as shown in Figure 10-1. The
baud-rate generator can be driven by the internal system clock, MCLK, or by the external clock, UCLK. The
transmitter and receiver blocks have independent data buffer registers and data shifters.
Transmit data is written first to the transmit buffer register. From there, it is copied to the transmit shifter and then
shifted out by the transmit data pin, UATXDn. Receive data is shifted in by the receive data pin, UARXDn. It is
then copied from the shifter to the receive buffer register when one data byte has been received.
The SIO control units provide software controls for mode selection, and for status and interrupt generation.
NOTE
For the UART Tx interrupt method, you should write dummy byte to UART Tx buffer register
before initialize UART. With this, you can generate UART Tx interrupt when Tx Buffer empty.
10-1
SAMSUNG [ SAMSUNG ]
