HDLC CONTROLLERS
S3C4510B
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
A R T R T T T
R T T T D D D
R
x
W
A
R T B
R
x
D D D
P R T
T D D R T
x R T
T
x
u
t
x
x
x
x
x
x
x
x
x
x R R T
x
4
x R
4 G
x x
N N D D P A
E L S F
x
x
x
E
L
x
x
E x x R R
A
B
T
E
X
T
o O O
I
T R B
C O F L M S S
H O L A A T T
O P A G D S S
W W E
D D N
N N R R S S
S S
L E E
E N N
N
E C C S R M T
N R R C
C C O
N
B
G
E K K
C
[18] Tx single flag (TxSFLAG)
0 = Double flag mode (a closing & opening flags are used to separate frames)
1 = Single flag mode (only one flags are used to separate frames)
[19] Tx loop-back mode (TxLOOP)
0 = Normal operation.
1= The tramsmit data output is internally connected to the receiver data input for self
testing.
[20] Rx echo mode (RxECHO)
0 = Disable Tx auto-echo mode.
1 = Enable Rx DMA Tx block is reset.
[21] Tx abort extension (TxABTEXT)
0 = At least consecutive eigth 1s are transferred.
1 = At least 16 consecutive 1s are transferred.
[22] Tx abort (TxABT)
0 = Normal
1 = Enable (at least eight consecutive 1s are transmitted.)
[23] Tx preamble (TxPRMB)
0 = Transmit a mark idle is time fill bit pattern.
1 = Transmit the content of HPRMB
[24] Tx data terminal ready (TxDTR)
0 = nDTR goes high level.
1 = nDTR goes low level.
[25] Rx frame discontinue (TxDISCON)
0 = Normal
1 = Ignore the currently received frame
[26] Tx No CRC (TxNOCRC)
0 = Disable
1 = CRC is not appended by hardware.
[27] Rx No CRC (RxNOCR)
0 = Disable
1 = Receiver does not check CRC by hardware.
(CRC is treated as data in any case)
[28] Auto enable (AutoEN)
0 = Normal operation. The nCTS and nDCD become high, the transmitter sends mark
idle and receiver receives data.
1 = The nDCD and nCTS become high, RxFIFO, Rx block, TxFIFO, and Tx block are
cleared. The transmitter sends mark idle, and the receiver does not operate.
[31:29] Reserved
Figure 8-15. HDLC Control Register (HCON) (Continued)
8-34
SAMSUNG [ SAMSUNG ]
