S3C4510B
ETHERNET CONTROLLER
FULL-DUPLEX PAUSE OPERATIONS
Transmit Pause Operation
To enable a full-duplex Pause operation, the special broadcast address for MAC control packets must be
programmed into the CAM, and the corresponding CAM enable bit set. The special broadcast address can be a
CAM location. To optimize the utilization CAM entries, you can specify a preference for specific CAM locations.
This feature is described below.
The MAC receive circuit recognizes a full-duplex Pause operation when the following conditions are met:
— The type/length field has the special value for MAC Control packets, 0x8808.
— The packet is recognized by the CAM.
— The length of the packet is 64 bytes.
— The operation field specifies a Pause operation.
When a full-duplex pause operation is recognized, the MAC receive circuit loads the operand value into the
pause count register. It then signals both the MAC and the BDMA engine that the pause should begin at the end
of the current packet, if any.
The pause circuit maintains the pause counter, and decrements it to zero. It does this before it signals the end of
the pause operation, and before allowing the transmit circuit to resume its operation.
If a second full-duplex pause operation is recognized while the first operation is in effect, the pause counter is
reset with the current operand value. Note that a count value of zero may cause pre-mature termination of a
pause operation that is already in progress.
Remote Pause Operation
To send a remote pause operation, following these steps:
1. Program CAM location 0 with the destination address.
2. Program CAM location 1 with the source address.
3. Program CAM location 18 with length/type field, opcode, and operand.
4. Program the 2 bytes that follow the operand with 0000H.
5. Program the three double words that follow CAM location 18 with zeros.
6. Write the transmit control register to set the SdPause bit.
The destination address and source address are commonly used as the special broadcast address for MAC
control frames and the local station address, respectively. To support future uses of MAC control frames, these
values are fully programmable in the flow control 100-/10-Mbit/s Ethernet MAC.
When the remote Pause operation is completion, the transmit status is written to the transmit control frame status
register. The BDMA engine is responsible for providing an interrupt enable control.
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