S3C4510B
ETHERNET CONTROLLER
THE MAC TRANSMIT BLOCK
The MAC transmit block is responsible for transmitting data. It complies with the IEEE802.3 standard for carrier
sense multiple access with collision detection (CSMA/CD) protocol. The MAC transmit block consists of the
following sections:
— Transmit FIFO and controllers
— Preamble and jam generators
— Pad generator
— Parallel CRC generator
— Threshold logic and counters
— Back-off and retransmit timers
— Transmit state machine
Figure 7-3 shows the MAC transmit function blocks in detail.
Parity
Check
Preamble and
Tx_DB [7:0]
JAM generator
MAC
and PARITY
M
I
I
Transmit
FIFO
(80 x 9)
9
TxD [3:0]
9
8
a
n
d
PAD
Generator
Tx_CLK
CrS
CRC
Generator
Tx_EOF
Tx_wr#
Tx_rdy
B
D
I
Write FIFO
Controller
and Counter
10
M
b
y
t
Tx_er
Tx_en
Read FIFO
Controller
and Counter
Transmit
State
Matchine
e
Col
Threshold
Logic and
Counters
I/F
Back off and
Retransmit
Timers
SYS_CLK Domain
Tx_CLK Domain
Figure 7-3. MAC Transmit Function Blocks
7-7