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KFG1216U2B-SIB6 参数 Datasheet PDF下载

KFG1216U2B-SIB6图片预览
型号: KFG1216U2B-SIB6
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 32MX16, 70ns, PBGA67]
分类和应用: 内存集成电路
文件页数/大小: 120 页 / 1551 K
品牌: SAMSUNG [ SAMSUNG ]
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OneNAND512Mb(KFG1216U2B-xIB6)  
FLASH MEMORY  
In order to perform the Internal Erase Routine, the following command sequence is necessary.  
The Host sets the block address of the memory location.  
The Erase Command initiates the Internal Erase Routine. During the execution of the Routine, the host is  
not required to provide further controls or timings. During the Internal erase routine, all commands, except  
the Reset command and Erase Suspend Command, written to the device will be ignored.  
A reset during an erase operation will cause data corruption at the corresponding location.  
3.10.2 Multi-Block Erase Operation  
See Timing Diagram 6.12  
Using Multi-Block Erase, the device can be erased up to 64 multiple blocks simultaneously.  
Multiple blocks can be erased by issuing a Multi-Block Erase command and writing the block address of the  
memory location to be erased. The final Flash Block Address (FBA) and Block Erase command initiate the internal multi block erase  
routine. During a  
Multi-Block Erase, the OnGo bit of the Controller Status Register is set to '1'(busy) from the time that the first block address to be  
latched is written to the time that the actual erase operation finishes.  
During block address latch sequence, issuing of other commands except Block Erase, and Multi Block Erase at INT=High will abort  
the current operation. So to speak, It will cancel the previously latched addresses of Multi Block Erase Operation.  
On the other hand, Other command issue at INT=low will be ignored.  
A reset during an erase operation will cause data corruption at the address location being operated on during the reset.  
Despite a failed block during Multi-Block Erase operation, the device will continue the erase operation until all other specified blocks  
are erased.  
Erase Suspend Command issue during Multi Block Erase Address latch sequence is prohibited.  
Locked Blocks  
If there are locked blocks in the specified range, the Multi-Block Erase operation works as the follows.  
Case 1: All specified blocks except BA(2) will be erased.  
[BA(1)+0095h] + [BA((2), locked))+0095h] + ... + [BA(N-1)+0095h] + [BA(N)+0094h]  
Case 2: Multi-Block Erase Operation fails to start if the last Block Erase command is put together with the locked block address until  
right command and address input are issued.  
[BA(1)+0095h] + [BA(2)+0095h] + ... + [BA(N-1)+0095h] + [BA((N), locked)+0094h]  
Case 3: All specified blocks except BA(N) are erased.  
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