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KFG1216U2B-SIB6 参数 Datasheet PDF下载

KFG1216U2B-SIB6图片预览
型号: KFG1216U2B-SIB6
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 32MX16, 70ns, PBGA67]
分类和应用: 内存集成电路
文件页数/大小: 120 页 / 1551 K
品牌: SAMSUNG [ SAMSUNG ]
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OneNAND512Mb(KFG1216U2B-xIB6)  
FLASH MEMORY  
2.8.18.1  
Two Methods to Clear Interrupt Register in Command Input  
To clear Interrupt Register in command input, user may select one from either following methods.  
First method is to turn INT to low by manually writing 0000h to INT bit of Interrupt Register. 1)  
Second method is input command while INT is high, and the device will automatically turn INT to low.1)  
(Second method is equivalent with method used in general NAND Flash)  
User may choose the desirable method to clear Interrupt Register.  
Method 1: Manually set INT=0 before writing command into Command Register: Manual INT Mode  
(1) Clear Interrupt Register (F241h) by writing 0000h into INT bit of Interrupt Register. This operation will make INT pin turn low. 1)  
(2) Write command into Command Register. This will make the device to perform the designated operation.  
(3) INT pin will turn back to high once the operation is completed. 1)  
INT pin1)  
INT bit  
Write command into  
Command Register  
Write 0 into  
INT bit of  
INT will automatically turn to high  
when designated operation is completed.  
Interrupt Register  
Note 1) INT pin polarity is based on ’IOBE=1 and INT pol=1 (default)’ setting  
Method 2: Write command into Command Register at INT ready state: Auto INT Mode  
(1) Write command into Command Register. This will automatically turn INT from high to low. 1)  
(2) INT pin will turn back to high once the operation is completed. 1)  
INT pin1)  
INT bit  
INT will automatically  
turn to Busy State  
Write command into  
Command Register  
INT will automatically turn back to ready state  
when designated operation in completed.  
Note 1) INT pin polarity is based on ’IOBE=1 and INT pol=1 (default)’ setting  
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