K9F1208Q0A K9F1216Q0A
K9F1208D0A K9F1216D0A
K9F1208U0A K9F1216U0A
FLASH MEMORY
Figure 7. Read1 Operation
CLE
CE
On K9F1208U0A-Y,P or K9F1208U0A-V,F
CE must be held low during tR
WE
ALE
R/B
RE
tR
00h
Start Add.(4Cycle)
Data Output(Sequential)
I/O0~7
X8 device : A0 ~ A7 & A9 ~ A25
X16 device : A0 ~ A7 & A9 ~ A25
(00h Command)
Main array
(01h Command)
1)
1st half array 2st half array
Data Field
Spare Field
Data Field
Spare Field
NOTE: 1) After data access on 2nd half array by 01h command, the start pointer is automatically moved to 1st half
array (00h) at next cycle. 01h command is only available on X8 device(K9F1208X0A).
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