R2025S/D
• Voltage Monitoring Circuit
The VDD supply voltage monitoring circuit is configured to conduct a sampling operation during an interval of
7.8ms per second to check for a drop in supply voltage below a threshold voltage of 2.1 or 1.3v for the VDSL bit
setting of 0 (the default setting) or 1, respectively, in the Control Register 2, thus minimizing supply current
requirements as illustrated in the timing chart below. This circuit suspends a sampling operation once the VDET
bit is set to 1 in the Control Register 2. The VDD supply voltage monitor is useful for back-up battery checking.
VDD
2.1v or 1.3v
7.8ms
PON
Internal nitiali-
zation period
(1 to 2sec.)
1s
Sampling timing for
VDD supplyvoltage
VDET
(D6 in Address Fh)
VDET
0
←
PON
0
←
VDET
0
←
33
RICOH [ RICOH ELECTRONICS DEVICES DIVISION ]
