RF2052
Setting The Operating Frequency
Setting the operating frequency of the device requires a number of registers to be programmed.
Set operating
frequencies
3
When programming the operating frequency it is
necessary to select the appropriate VCO and LODIV
Program
values. The P2_VCOSEL and P2_LODIV bits are
P2_VCOSEL and
located in the PLL2x0 register.
P2_LODIV
If the LO frequency is above 2GHz the LO path current
(CFG5) should be set to 0xC
Program
P2_N
The integer part of the PLL division ratio is
programmed into the PLL2x3 register.
Program
P2_NUM_MSB
The MSB of the fractional part of the synthesizer PLL
divider value is programmed into the PLL2x1 register.
The LSB of the fractional part of the synthesizer PLL
divider value is programmed into the PLL2x2 register
together with the CT_CAL bits if fast frequency
switching is required.
(Depending on required frequency resolution and
coarse tune settings this may not be required.)
Program
P2_NUM_LSB,
P2_CT_DEF
Frequency
programmed
4
A total of four registers must be programmed to set the device operating frequency. This will take 5.2us for each path at maxi-
mum clock speed.
To change the frequency of the VCO it will be necessary to repeat these operations. However, if the frequency shift is small it
may not be necessary to reprogram the VCOSEL and LODIV bits reducing the register writes to three.
For an example on how to determine the integer and fractional parts of the synthesizer PLL division ratio please refer to the
detailed description of the PLL on page 11.
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