R8C/13 Group
14. A/D Converter
CKS1=1
CKS1=0
CKS0=1
CKS0=0
φAD
fAD
1/2
1/2
A/D conversion rate
selection
VCUT=0
VCUT=1
AVSS
VREF
Resistor ladder
Successive conversion register
ADCON0
AD register
Vcom
VIN
Decoder
Data bus
Comparator
CH2,CH1,CH0=000
CH2,CH1,CH0=001
2
2
P07/AN0
P06/AN1
P05/AN2
CH2,CH1,CH0=010
CH2,CH1,CH0=011
CH2,CH1,CH0=100
CH2,CH1,CH0=101
CH2,CH1,CH0=110
2
2
ADGSEL0=0
ADGSEL0=1
P04/AN3
P03/AN4
P02/AN5
P01/AN6
P00/AN7
2
2
2
CH2,CH1,CH0=111
2
CH2,CH1,CH0=100
CH2,CH1,CH0=101
CH2,CH1,CH0=110
2
P10/AN8
P11/AN9
P12/AN10
P13/AN11
2
2
2
CH2,CH1,CH0=111
CH0 to CH2, ADGSEL0, CKS0: Bits in ADCON0 register
CKS1, VCUT: Bits in ADCON1 register
Figure 14.1 A/D Converter Block Diagram
Rev.1.20 Jan 27, 2006 page 125 of 205
REJ09B0111-0120