MITSUBISHI MICROCOMPUTERS
M37270MF-XXXSP
M37270EF-XXXSP, M37270EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
➁After a falling of the clock run-in pulse set in bits 2 to 0 of clock run-
in detect register 2 (address 00E916) is detected, a start bit is
detected by sampling a comparator output. A sampling clock for
sampling is obtained by dividing the reference clock generated in
the timing signal generating circuit by 13.
Figure 28 shows the structure of clock run-in detect register 2.
The contents of bits 2 to 0 of clock run-in detect register 2 and bit
1 of clock run-in register 2 are written at a falling of the horizontal
synchronizing signal. For this reason, even if an instruction for
setting is executed, the contents of the register cannot be rewritten
until a falling of the horizontal synchronizing signal.
7
0
Clock run-in detect register 2
(CRD2 : address 00E916)
Clock run-in pulses for sampling
b2 b1 b0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0 : Not available
1 : 1st pulse
0 : 2nd pulse
1 : 3rd pulse
0 : 4th pulse
1 : 5th pulse
0 : 6th pulse
1 : 7th pulse
7
1
0
1
Clock run-in register 2
(CR2 : address 00E716)
0
0 1 1 1
Fix this bit to “1”
Start bit detecting method
selection bit
0 : Method 1
1 : Method 2
Data clock generating time
Time from detection of a start bit
to occurrence of a data clock
= (13 + set value) ✕ reference
clock period
Fix these bits to “1001112”
Fig. 27. Structure of clock run-in register 2
Fig. 28. Structure of clock run-in detect register 2
(8) Clock run-in determination circuit
This circuit sets a window in the clock run-in portion in the composite
video signal, and then determinates clock run-in by counting the
number of pulses in this window. Set the time from a falling of the
horizontal synchronizing signal to a start of the window by bits 0 to 5
of the window register (address 00E216; refer to Figure 29). The
window ends according to the contents of the setting of the start bit
position register (refer to Figure 26).
7
0
0
Window register
(WN : address 00E216)
0
Window start time
Time from a falling of the
horizontal synchronizing signal
to a start of the window = 4 ✕ set
value (“0016” to “3F16”) ✕ reference
clock period
Fix these bits to “0”
Fig. 29. Structure of window register
32
RENESAS [ RENESAS TECHNOLOGY CORP ]
