M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
Data bus
8
Timer 1 latch (8)
8
1/4096
Timer 1
interrupt request
XIN
1/2
1/8
Timer 1 (8)
T12M0
T12M4
T12M2
8
8
Timer 2 latch (8)
8
Timer 2
interrupt request
TIM2
Timer 2 (8)
T12M1
T12M3
8
8
H
SYNC
Reset
STP
instruction
FF16
T34M5
Timer 3 latch (8)
8
TIM3
Timer 3
interrupt request
Timer 3 (8)
T34M0
T34M2
8
8
Selection gate :
Connected to black
colored side at reset
0716
T34M1
Timer 4 latch (8)
8
T12M : Timer 12 mode register
T34M : Timer 34 mode register
Timer 4
interrupt request
Timer 4 (8)
T34M4
T34M3
8
Notes 1: “H” pulse width of external clock inputs TIM2 and TIM3 needs 4 machine cycles or more.
2: When the external clock source is selected, timers 2 and 3 are counted at a rising edge of input signal.
3: In the stop mode or the wait mode, external clock inputs TIM2 and TIM3 cannot be used.
Fig. 8.4.3 Timer Block Diagram
Rev.1.00 Oct 01, 2002 page 26 of 110
REJ03B0134-0100Z
RENESAS [ RENESAS TECHNOLOGY CORP ]
