M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
■ SFR area (addresses E016 to FF16
)
<Bit allocation>
<State immediately after reset>
:
: “0” immediately after reset
0
1
?
Function bit
:
Name
: “1” immediately after reset
:
No function bit
: Fix to this bit to “0”
(do not write to “1”)
0
1
: Fix to this bit to “1”
(do not write to “0”)
Register
Bit allocation
State immediately after reset
Address
b7
b0 b7
b0
HR5 HR4 HR3 HR2 HR1 HR0
CV16 CV15 CV14 CV13 CV12 CV11 CV10
CV26 CV25 CV24 CV23 CV22 CV21 CV20
Horizontal register (HR)
Vertical register 1 (CV1)
Vertical register 2 (CV2)
E016
E116
E216
E316
0016
0
0
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
CS21 CS20 CS11 CS10
Character size register (CS)
Border selection register (MD)
Color register 0 (CO0)
E416
E516
E616
E716
E816
E916
EA16
EB16
EC16
ED16
EE16
EF16
F016
F116
F216
F316
F416
F516
F616
F716
F816
0
0
0
0
0
0
0
0
?
0
?
?
?
0
?
?
MD20
MD10
CO07 CO06 CO05 CO04 CO03 CO02 CO01
CO17 CO16 CO15 CO14 CO13 CO12 CO11
CO27 CO26 CO25 CO24 CO23 CO22 CO21
CO37 CO36 CO35 CO34 CO33 CO32 CO31
0016
0016
0016
0016
0016
?
Color register 1 (CO1)
Color register 2 (CO2)
Color register 3 (CO3)
CC7
CC2 CC1 CC0
OSD control register (CC)
OUT1 OUT2 R/G/B VSYC HSYC
CK1 CK0
OP7 OP6 OP5
OSD port control register (CRTP)
OSD clock selection register (CK)
A-D control register 1 (AD1)
A-D control register 2 (AD2)
Timer 1 (TM1)
0016
0016
0
0
0
0
0
0
ADM4
ADM2 ADM1 ADM0
?
0
0
0
0
0
0
0
ADC5 ADC4 ADC3 ADC2 ADC1 ADC0
0016
FF16
0716
FF16
0716
0016
0016
?
Timer 2 (TM2)
Timer 3 (TM3)
Timer 4 (TM4)
T12M4 T12M3 T12M2 T12M1 T12M0
Timer 12 mode register (T12M)
Timer 34 mode register (T34M)
PWM5 register (PWM5)
0
T34M5 T34M4 T34M3 T34M2 T34M1 T34M0
?
?
RE5 RCEK40 RE3
CK0
0
0
0
1
0
1
0
1
0
0
0
1
0
0
?
0
Interrupt input polarity register (RE)
Test register (TEST)
0
1
F916
FA16
FB16
FC16
FD16
FE16
FF16
0016
0016
1
CPU mode register (CPUM)
Interrupt request register 1 (IREQ1)
Interrupt request register 2 (IREQ2)
Interrupt control register 1 (ICON1)
Interrupt control register 2 (ICON2)
CM2
1
1
1
1
1
0
0
IT3R IICR VSCR CRTR TM4R TM3R TM2R TM1R
0016
1T2R 1T1R
MCSKR0
S1R
0016
0016
0016
0
IT3E IICE VSCECRTETM4E TM3ETM2E TM1E
1T2E 1T1E
MSE
S1E
0
0
0
0
Fig. 8.2.4 Memory Map of Special Function Register (SFR) (2)
Rev.1.00 Oct 01, 2002 page 16 of 110
REJ03B0134-0100Z
RENESAS [ RENESAS TECHNOLOGY CORP ]
