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M37161EFSP 参数 Datasheet PDF下载

M37161EFSP图片预览
型号: M37161EFSP
PDF下载: 下载PDF文件 查看货源
内容描述: 单片8位CMOS微机 [SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER]
分类和应用: 微控制器和处理器外围集成电路光电二极管计算机可编程只读存储器时钟
文件页数/大小: 129 页 / 1075 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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M37161M8/MA/MF-XXXSP/FP,M37161EFSP/FP
Ports P0
0
–P0
7
Direction register
N-channel open-drain output
Ports P0
0
–P0
7
Note :
Each port is also used as follows :
P0
0
: DA/PWM0
P0
1
–P0
4
: PWM1–PWM4
P0
5
: AD3
P0
6
: INT2/AD4
P0
7
: INT1
Data bus
Port latch
Ports P1, P2, P3
0
, P3
1
Direction register
Data bus
Port latch
CMOS output
Ports P1
,
P2, P3
0
, P3
1
Notes 1 :
Each port is also used as follows :
P1
0
: CLK
CONT
P2
0
: S
CLK
/AD5
P2
1
: S
OUT
/AD6
P1
1
: SCL1
P2
2
: S
IN
/AD7
P1
2
: SCL2
P1
3
: SDA1
P2
3
: TIM3
P2
4
: TIM2
P1
4
: SDA2
P2
5
: INT3
P1
6
: AD8/TIM2
P2
6
: X
CIN
P2
7
: X
COUT
P3
0
: SDA3
P3
1
: SCL3
2:
The output structure of ports P1
1
–P1
4,
P3
0
–P3
1
is N-channel open-drain output when using as multi-master
I
2
C-BUS interface (it is the same with P0
0
–P0
7
).
3:
The output structure of ports P2
0
and P2
1
is N-channel open-drain output when using as serial output (it is the
same as P0
0
–P0
7
).
Fig. 7.1 I/O Pin Block Diagram (1)
Rev.1.00
2003.11.25
page 9 of 128