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M37161EFSP 参数 Datasheet PDF下载

M37161EFSP图片预览
型号: M37161EFSP
PDF下载: 下载PDF文件 查看货源
内容描述: 单片8位CMOS微机 [SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER]
分类和应用: 微控制器和处理器外围集成电路光电二极管计算机可编程只读存储器时钟
文件页数/大小: 129 页 / 1075 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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M37161M8/MA/MF-XXXSP/FP,M37161EFSP/FP
6. PERFORMANCE OVERVIEW
Table 6.1 Performance Overview
Parameter
Number of basic instructions
Instruction execution time
Clock frequency
Memory size
ROM M37161M8-XXXSP/FP
M37161MA-XXXSP/FP
M37161MF-XXXSP/FP,M37161EFSP/FP
Functions
71
0.5 ms (the minimum instruction execution time, at 8 MHz oscillation fre-
quency)
8 MHz (maximum)
32K bytes
40K bytes
60K bytes
1152 bytes (ROM correction memory included)
1472 bytes (ROM correction memory included)
20K bytes
128 bytes
8-bit
1 (N-channel open-drain output structure, can be used as 8-bit PWM
output pins, INT input pins, A-D input pin, 14-bit PWM output pins. How-
ever, CMOS output structure, when P0
0
is used as serial output.)
7-bit
1 (CMOS input/output structure, however, N-channel open-drain
output structure, when P1
1
–P1
4
are used as multi-master I
2
C-BUS inter-
face, can be used as A-D input pins, timer external clock input pins, multi-
master I
2
C-BUS interface)
8-bit
1 (P2 is CMOS input/output structure, however, N-channel open-
drain output structure when P2
0
and 2
1
are used as serial output, can be
used as serial input/output pins, timer external clock input pins, A-D input
pins, INT input pin, sub-clock input/output pins)
2-bit
1 (CMOS input/output structure, however, N-channel open-drain out-
put structure, when used as multi-master I
2
C-BUS interface, can be used as
multi-master I
2
C-BUS interface.)
3-bit
1
2-bit
1 (can be used as OSD input pins)
4-bit
1 (CMOS output structures, can be used as OSD output pins)
8-bit
1
One (Three lines)
8 channels (7-bit resolution)
14-bit
1, 8-bit
5
8-bit
6
2 vectors
128 levels (maximum)
<16 types>
INT external interrupt
3, Internal timer interrupt
6, Serial I/O interrupt
1, OSD interrupt
1, Multi-master I
2
C-BUS interface interrupt
1, f(X
IN
)/
4096 interrupt
1, V
SYNC
interrupt
1, BRK instruction interrupt
1, reset
1
2 built-in circuits (externally connected to X
CIN/OUT
is a ceramic resonator
or a quartz-crystal oscillator)
RAM
M37161M8-XXXSP/FP
M37161MA/MF-XXXSP/FP,M37161EFSP/FP
OSD ROM
Input/Output
ports
OSD RAM
P0
I/O
P1
0
–P1
6
I/O
P2
0
–P2
7
I/O
P3
0
, P3
1
P35-P37
P5
0
, P5
1
P5
2
–P5
5
Serial I/O
Multi-master
I
2
C-BUS
interface
A-D comparator
PWM output circuit
Timers
ROM correction function
Subroutine nesting
Interrupt
I/O
Input
Input
Output
Clock generating circuit
Rev.1.00
2003.11.25
page 5 of 128