欢迎访问ic37.com |
会员登录 免费注册
发布采购

HD64F7055S 参数 Datasheet PDF下载

HD64F7055S图片预览
型号: HD64F7055S
PDF下载: 下载PDF文件 查看货源
内容描述: 瑞萨32位RISC单片机SuperH RISC engine族/ SH7000系列 [Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series]
分类和应用:
文件页数/大小: 1002 页 / 4874 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
 浏览型号HD64F7055S的Datasheet PDF文件第8页浏览型号HD64F7055S的Datasheet PDF文件第9页浏览型号HD64F7055S的Datasheet PDF文件第10页浏览型号HD64F7055S的Datasheet PDF文件第11页浏览型号HD64F7055S的Datasheet PDF文件第13页浏览型号HD64F7055S的Datasheet PDF文件第14页浏览型号HD64F7055S的Datasheet PDF文件第15页浏览型号HD64F7055S的Datasheet PDF文件第16页  
Item
11.3.9 PWM Timer Function
Figure 11.21 PWM Timer
Operation
Page Revisions (See Manual for Details)
366, Description amended
367 If the DTR value is H'0000, the output does not change
(0% duty). However, when H'0000 is set to DTR, do not
directly write H'0000 to DTR. Set H'0000 to BFR and
forward it from BFR to DTR. If H'0000 is directly set to
DTR, duty may not be 0%. A duty of 100% is specified by
setting DTR = CYLR. Do not set a value in DTR that will
result in the condition DTR > CYLR.
Figure amended
TO6A amended
PWM output does not change for one cycle after
activation*
Note added
*
PWM output is not guaranteed because retained
value is output for one cycle after activation.
Figure replaced
11.3.9 PWM Timer Function
Figure 11.22 Complementary
PWM Mode Operation
11.3.12 Channel 10 Functions
Inter-Edge Measurement
Function and Edge Input
Cessation Detection Function:
Figure 11.28 TCNT10A Capture
Operation and Compare-Match
Operation
11.7 Usage Notes
Contention between DCNT Write
and Counter Clearing by
Underflow:
Figure 11.72 Contention between
DCNT Write and Underflow
11.7 Usage Notes
ATU Pin Setting:
368
372
Figure amended
12345677
1234
5678
00000001
55555555
414
Note added
Figure amended
Underflow signal
H'5555 is written to the DCNT because
the write to the DCNT has priority
0001
0000
5555
DCNT
418
Description amended
When a port is set to the ATU pin function, the following
points must be noted because input capture or count
operation may occur.
17.4.2 Scan Mode
Figure 17.4 Example of A/D
Converter Operation(Scan
Mode(Single-Cycle Scan),
Channels AN0 to AN11 Selected)
608
Figure amended
Continuous A/D conversion
Set
*
ADST
Clear
Rev.2.0, 07/03, page xii of xxxviii